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CS3524A
Voltage Mode PWM Control Circuit
with 200mA Output Drivers
Description
Features
The CS3524A PWM control circuit
retains the same versatile architecture
of the industry standard CS3524
(SG3524) while adding substantial
improvements.
The CS3524 is pin-compatible with
“non-A” versions, and in most applica-
tions can be directly interchanged. The
CS3524A, however, eliminates many of
the design restrictions which had pre-
viously required additional external
circuitry.
The CS3524A includes a precision 5V
reference trimmed to ±1% accuracy
(eliminating the need for potentiometer
adjustments), an error amplifier with
an output voltage swing extending to
5V, and a current sense amplifier use-
ful in either the ground or power sup-
ply output lines. The uncommitted
60V, 200mA NPN output pair greatly
enhances the output drive capability.
The CS3524A features an undervoltage
lockout circuit which disables all inter-
nal circuitry (except the reference) until
the input voltage has risen to 8V. This
holds standby current low until turn-
on, and greatly simplifies the design of
low power, off-line supplies. The turn-
on circuit has approximately 600mV of
hysteresis for jitter free activation.
Other improvements include a PWM
latch that insures freedom from multi-
ple pulsing within a period, even in
noisy environments; logic to eliminate
double pulsing on a single output, a
200ns external shutdown capability,
and automatic thermal protection from
excessive chip temperature. The oscil-
lator circuit is usable to 500kHz and is
easier to synchronize with an external
clock pulse.
s Precision Reference
Internally Trimmed to ±1%
s Current Limit
s Undervoltage Lockout
s Start-up Supply Current
< 4mA
s Output to 200mA
s 60V Output Capability
s Wide Common-mode
Input Range for Error and
Current Limit Amplifiers
s PWM Latch Insures Single
Pulse per Period
s Double Pulse Suppression
s 200ns Shutdown
s Guaranteed Frequency
s Thermal Shutdown
Block Diagram
VIN
SYNC
RT
CT
COMP
EA-
EA+
ISENSE+
ISENSE-
OSC
UV
Sense
CLOCK
5V Reference
Regulator
Power to
Internal
Circuitry
T
Flip
Flop
RAMP
VIN
-
EA
+
200mV
VIN
+
COMP
-
R
S
PWM
S Latch
1k
10k
CL
VREF
V O UTA
EA
V O UTB
EB
SHUTDOWN
Gnd
Package Options
16 Lead PDIP & SO Wide
EA- 1
EA+ 2
SYNC 3
ISENSE+ 4
ISENSE- 5
RT 6
CT 7
Gnd 8
16 VREF
15 VIN
14 EB
13 VOUTB
12 VOUTA
11 EA
10 SHUTDOWN
9 COMP
Rev. 10/28/96
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
1 A ® Company

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Absolute Maximum Ratings
Supply Voltage (VIN) .................................................................................................................................................................40V
Collector Supply Voltage (VCC) ...............................................................................................................................................60V
Output Current (Each Output)...........................................................................................................................................200mA
Reference Output Current.....................................................................................................................................................50mA
Oscillator Charging Current ..................................................................................................................................................5mA
Power Dissipation at TA=25˚C.........................................................................................................................................1000mW
Power Dissipation at TJ=+25˚C........................................................................................................................................2000mW
Derate for Case Temperature above +25˚C........................................................................................................16mW/˚C
Storage Temperature Range ................................................................................................................................-65˚C to +150˚C
Lead Temperature Soldering: Wave Solder (through hole styles only)..........................................10 sec. max, 260°C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183°C, 230°C peak
Electrical Characteristics: 0˚C TA +70˚C for the CS3524A; VIN = VCC = 20V; unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
s Turn-on Characteristics
Input Voltage
Turn-on Threshold
Turn-on Current
Operating Current
Turn-on Hysteresis*
Operating range after Turn-on
VIN Turn-on - 100mV
VIN = 8 to 40V
8
5.5 7.5
2.5
5
0.6
40
8.5
4.0
10
UNIT
V
V
mA
mA
V
s Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability*
Short Circuit Current
Output Noise Voltage*
Long Term Stability*
TA = 25˚C
VIN = 10 to 40V
IL = 0 to 20mA
Over Operating Range
VREF = 0, TA = 25˚C
10Hz f 10kHz, TA = 25˚C
TA = 125˚C; 1000 Hrs.
4.90
s Oscillator Section (Unless otherwise specified, RT = 2700, CT = 0.01µF)
Initial Accuracy
TA = 25˚C
39
Temperature Stability*
Over Operating Temperature Range
Minimum Frequency
Maximum Frequency
Output Amplitude*
Output Pulse Width*
Ramp Peak
RT = 150k, CT = 0.1µF
RT = 2.0k, CT = 470pF
TA = 25˚C
TA = 25˚C
500
3.3
Ramp Valley
0.7
5.00
10
20
20
80
40
20
43
1
3.5
0.5
3.5
0.9
5.20 V
30 mV
50 mA
50 mV
100 mA
µVrms
50 mV
47 kHz
2%
120 Hz
kHz
V
µs
3.7 V
1.0 V
s Error Amplifier Section (Unless otherwise specified, VCM = 2.5V)
Input Offset Voltage
Input Bias Current
Input Offset Current
Common Mode
Rejection Ratio
VCM = 1.5 to 5.5V
Power Supply Rejection Ratio VIN = 10 to 40V
Output Swing
Minimum Total Range
60
50
0.5
* These parameters are guaranteed by design but not 100% tested in production.
2
2
1
0.5
75
60
10 mV
10 µA
1.0 µA
dB
dB
5.0 V

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Electrical Characteristics: continued
PARAMETER
TEST CONDITIONS
MIN
s Error Amplifier Section (Unless otherwise specified, VCM = 2.5V): continued
Open Loop Voltage Gain
VOUT = 1 to 4V, RL 10 M
60
Gain-Bandwidth*
TA = 25˚C, AV = 0dB
s Current Limit Amplifier (Unless otherwise specified, VSENSE = VO)
Input Offset Voltage
TA = 25˚C, EA Set for Max. Output
Input Offset Voltage
Over Operating Temperature Range
Input Bias Current
Common Mode
Rejection Ratio
VSENSE = 0 to 15V
Power Supply Rejection Ratio VIN = 10 to 40V
Output Swing
Minimum Total Range
Open Loop Voltage Gain
Delay Time*
VOUT = 1 to 4V, RL 10M
VIN = 300mV
180
170
50
50
0.5
70
s Output Section (Each Output)
Collector Emitter Voltage
Collector Leakage Current
Saturation
Emitter Output Voltage
Rise Time*
Fall Time*
Comparator Delay*
Shutdown Delay*
Shutdown Threshold
Thermal Shutdown*
IC = 100µA
VCE = 50V
IC = 20mA
IC = 200mA
IE = 50mA
TA = 25˚C, R = 2k
TA = 25˚C, R = 2k
TA = 25˚C, VCOMP to VOUT
TA = 25˚C, VSHUT to VOUT
TA = 25˚C, RC = 2k
60
17
0.5
* These parameters are guaranteed by design but not 100% tested in production.
TYP
80
3
200
-1
60
60
80
300
80
0.1
0.2
1.0
18
200
100
300
200
0.7
165
MAX
UNIT
dB
MHz
220 mV
230 mV
-10 µA
dB
dB
5.0 V
dB
ns
V
20.0 µA
0.4 V
2.2 V
V
ns
ns
ns
ns
1.0 V
˚C
Typical Performance Characteristics
Error Amplifier Voltage Gain vs. Frequency Over RF
Duty Cycle vs. Input Voltage
RF =
80
RF = 1M
60 RF = 300k
RF = 100k
40 RF = 30k
VIN = 20V
TA = 25˚C
20
RF is impedance to ground.
Values below 30kwill begin
to limit the maximum
0 duty-cycle.
100 1k 10k 100k
FREQUENCY (Hz)
1M
50
40
VIN = 20V
RT = 2700
TA = 25˚C
30
20
Note: Duty-Cycle is
10 percent of two
clock periods that
one output conducts
0
01 2 3 45
INPUT VOLTAGE VIN
3

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Typical Performance Characteristics continued
Quiescent Supply Current vs. Supply Voltage Over
Temperature
10
Shutdown Delay From PWM Comparator
9
8 TA = -55°C
7 TA = 25°C
6 TA = 125°C
5
20
OUTPUT at
15 VOA or VOB
10
5
VIN = 20V
RL = 2k
0 TA = 25˚C
4
3
2
Note: Outputs off. RT =
1
0
0 10 20 30 40 50
SUPPLY VOLTAGE VIN (V)
5
4
3 INPUT at VOB
2
1
0 Note: Minimum input pulse width
to latch is 200ns
012 3
DELAY TIME (µs)
Oscillator Frequency vs. Timing Components Resistor
Over Timing Capacitance
1M
100k
10k
1k
VIN = 20V
TA = 25˚C
CT = 1.0nf
CT = 3.0nf
CT = 10nf
CT = 30nf
CT = 100nf
100
1
f
1.15
RTCT
2
5 10 20
50
TIMING RESISTOR - RT (k)
100
Output Dead Time vs. Timing Capacitor Value
10
5.0
VIN = 20V
RT = 2700
TA = 25˚C
2.0
1.0
0.5
0.2
0.1
1
Note: Dead time = osc output pulse
width plus output delay
2
5 10 20
50
TIMING CAPACITOR - CT (nf)
100
Current Limit Amplifier Delay
OUTPUT at COMP
6
5
Overdrive
4
5%
10%
3 20%
2 50%
1
0
INPUT at ISENSE+
0.2
0.1
VIN 20V TA 25˚C
EA+ = VREF
ISENSE– = Gnd
0.0
01 234
DELAY TIME (µs)
Turn-Off Delay From Shutdown
20
15 VIN = 20V
RL = 2k
10 TA = 25˚C
5 OUTPUT at
VOA OR VOB
0
1.0
0.5 INPUT at
SHUTDOWN
0.0
Note: Minimum input pulse width
to latch is 200ns
01 2 3
DELAY TIME (µs)
4

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Typical Performance Characteristics continued
Output Saturation Voltage vs. Output Current Over
Temperature
5
4
3
TA = 125˚C
2
TA = 25˚C
1
TA = –55˚C
0
0 50 100 150 200 250
OUTPUT COLLECTOR CURRENT (mA)
IS
VIN
SYNC
VREF
Open Loop Test Circuit
CS3524A
VCC
2k
1W
VOUTA
VOUTB
EA
EB
2k
1W
100k100k
SHUTDOWN
2k
10k
2k
0.1
RT CT
0.1
10k
1k
Note: The CS3524A should be able to be tested in any 3524 test circuit with two possible exceptions:
1. The higher gain-bandwidth of the current limit amplifier in the CS 3524A may cause oscillations in an uncom-
pensated 3524 test circuit.
2. The effect of the shutdown, cannot be seen at the compensation terminal, but must be
observed at the outputs.
5