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FSB50760SF, FSB50760SFT
Motion SPM® 5 SuperFET® Series
April 2014
Features
• UL Certified No. E209204 (UL1557)
• 600 V RDS(on) = 530 mMaxSuperFET MOSFET 3-
Phase with Gate Drivers and Protection
• Built-in Bootstrap Diodes Simplify PCB Layout
• Separate Open-Source Pins from Low-Side MOS-
FETS for Three-Phase Current-Sensing
• Active-HIGH Interface, Works with 3.3 / 5 V Logic,
Schmitt-trigger Input
• Optimized for Low Electromagnetic Interference
• HVIC Temperature-Sensing Built-in for Temperature
Monitoring
• HVIC for Gate Driving and Under-Voltage Protection
• Isolation Rating: 1500 Vrms / 1 min.
• RoHS Compliant
Applications
• 3-Phase Inverter Driver for Small Power AC Motor
Drives
Related Source
RD-402 - Reference Design for Motion SPM 5 Super-
FET Series
• AN-9082 - Motion SPM5 Series Thermal Performance
by Contact Pressure
• AN-9080 - User’s Guide for Motion SPM 5 Series V2
General Description
The FSB50760SF/SFT is an advanced Motion SPM® 5
module providing a fully-featured, high-performance
inverter output stage for AC Induction, BLDC and PMSM
motors such as refrigerators, fans and pumps. These
modules integrate optimized gate drive of the built-in
MOSFETs(SuperFET® technology) to minimize EMI and
losses, while also providing multiple on-module
protection features including under-voltage lockouts and
thermal monitoring. The built-in high-speed
HVIC requires only a single supply voltage and
translates the incoming logic-level gate inputs to the
high-voltage, high-current drive signals required to
properly drive the module's internal MOSFETs.
Separate open-source MOSFET terminals are available
for each phase to support the widest variety of control
algorithms.
FSB50760SF
Package Marking & Ordering Information
Device
FSB50760SF
FSB50760SFT
Device Marking
50760SF
50760SFT
Package
SPM5P-023
SPM5N-023
FSB50760SFT
Packing Type
Rail
Rail
Quantity
15
15
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
1
www.fairchildsemi.com

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Absolute Maximum Ratings
Inverter Part (each MOSFET unless otherwise specified.)
Symbol
Parameter
Conditions
VDSS
*ID 25
*ID 80
*IDP
*IDRMS
*PD
Drain-Source Voltage of Each MOSFET
Each MOSFET Drain Current, Continuous TC = 25°C
Each MOSFET Drain Current, Continuous TC = 80°C
Each MOSFET Drain Current, Peak
TC = 25°C, PW < 100 s
Each MOSFET Drain Current, Rms
TC = 80°C, FPWM < 20 kHz
Maximum Power Dissipation
TC = 25°C, For Each MOSFET
Rating
600
3.6
2.7
9.4
1.9
14.5
Control Part (each HVIC unless otherwise specified.)
Symbol
Parameter
Conditions
VCC Control Supply Voltage
VBS High-side Bias Voltage
VIN Input Signal Voltage
Applied Between VCC and COM
Applied Between VB and VS
Applied Between IN and COM
Rating
20
20
-0.3 ~ VCC + 0.3
Bootstrap Diode Part (each bootstrap diode unless otherwise specified.)
Symbol
Parameter
Conditions
VRRMB Maximum Repetitive Reverse Voltage
* IFB
* IFPB
Forward Current
Forward Current (Peak)
TC = 25°C
TC = 25°C, Under 1ms Pulse Width
Rating
600
0.5
1.5
Thermal Resistance
Symbol
Parameter
RJC
Junction to Case Thermal Resistance
Conditions
Each MOSFET under Inverter Oper-
ating Condition (1st Note 1)
Rating
8.6
Total System
Symbol
Parameter
TJ
TSTG
Operating Junction Temperature
Storage Temperature
VISO
Isolation Voltage
Conditions
60 Hz, Sinusoidal, 1 Minute, Con-
nect Pins to Heat Sink Plate
Rating
-40 ~ 150
-40 ~ 125
1500
1st Notes:
1. For the measurement point of case temperature TC, please refer to Figure 4.
2. Marking “ * “ is calculation value or design factor.
Unit
V
A
A
A
Arms
W
Unit
V
V
V
Unit
V
A
A
Unit
°C/W
Unit
°C
°C
Vrms
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
2
www.fairchildsemi.com

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Pin descriptions
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Pin Name
COM
VB(U)
VCC(U)
IN(UH)
IN(UL)
N.C
VB(V)
VCC(V)
IN(VH)
IN(VL)
VTS
VB(W)
VCC(W)
IN(WH)
IN(WL)
N.C
P
U, VS(U)
NU
NV
V, VS(V)
NW
W, VS(W)
Pin Description
IC Common Supply Ground
Bias Voltage for U-Phase High-Side MOSFET Driving
Bias Voltage for U-Phase IC and Low-Side MOSFET Driving
Signal Input for U-Phase High-Side
Signal Input for U-Phase Low-Side
No Connection
Bias Voltage for V-Phase High Side MOSFET Driving
Bias Voltage for V-Phase IC and Low Side MOSFET Driving
Signal Input for V-Phase High-Side
Signal Input for V-Phase Low-Side
Output for HVIC Temperature Sensing
Bias Voltage for W-Phase High-Side MOSFET Driving
Bias Voltage for W-Phase IC and Low-Side MOSFET Driving
Signal Input for W-Phase High-Side
Signal Input for W-Phase Low-Side
No Connection
Positive DC-Link Input
Output for U-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Negative DC-Link Input for U-Phase
Negative DC-Link Input for V-Phase
Output for V-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Negative DC-Link Input for W-Phase
Output for W Phase & Bias Voltage Ground for High-Side MOSFET Driving
(1) COM
(2) VB(U)
(3) VCC(U)
(4) IN (UH)
(5) IN (UL)
(6) N.C
(7) VB(V)
(8) VCC(V)
(9) IN (VH)
(10) IN (VL)
(11) VTS
(12) V B(W)
(13) V CC(W)
(14) IN (WH)
(15) IN (WL)
(16) N.C
VCC
HIN
LIN
COM
VB
HO
VS
LO
VCC
HIN
LIN
COM
VTS
VB
HO
VS
LO
VCC
HIN
LIN
COM
VB
HO
VS
LO
(17) P
(18) U, VS(U)
(19) N U
(20) NV
(21) V, VS(V)
(22) N W
(23) W, VS(W)
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
1st Notes:
3. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM® 5 product. External connections should be made as
indicated in Figure 3.
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
3
www.fairchildsemi.com

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Electrical Characteristics (TJ = 25°C, VCC = VBS = 15 V unless otherwise specified.)
Inverter Part (each MOSFET unless otherwise specified.)
Symbol
Parameter
Conditions
Min Typ Max Unit
BVDSS
Drain - Source
Breakdown Voltage
VIN = 0 V, ID = 1 mA (2nd Note 1)
600 -
-
V
IDSS
Zero Gate Voltage
Drain Current
VIN = 0 V, VDS = 600 V
- - 1 mA
RDS(on)
Static Drain - Source
Turn-On Resistance
VCC = VBS = 15 V, VIN = 5 V, ID = 2 A
- 460 530 m
VSD
Drain - Source Diode
Forward Voltage
VCC = VBS = 15 V, VIN = 0 V, ID = -2 A
- - 1.1 V
tON
tOFF
trr
EON
EOFF
RBSOA
Switching Times
VPN = 300 V, VCC = VBS = 15 V, ID = 2 A
VIN = 0 V 5 V, Inductive Load L = 3 mH
High- and Low-Side MOSFET Switching
(2nd Note 2)
Reverse Bias Safe Oper-
ating Area
VPN = 400 V, VCC = VBS = 15 V, ID = IDP, VDS = BVDSS,
TJ = 150°C
High- and Low-Side MOSFET Switching (2nd Note 3)
-
-
-
-
-
1200
970
160
120
10
-
-
-
-
-
Full Square
ns
ns
ns
J
J
Control Part (each HVIC unless otherwise specified.)
Symbol
Parameter
Conditions
IQCC
IQBS
UVCCD
UVCCR
UVBSD
UVBSR
Quiescent VCC Current
Quiescent VBS Current
Low-Side Under-Voltage
Protection (Figure 8)
High-Side Under-Voltage
Protection (Figure 9)
VCC = 15 V,
VIN = 0 V
Applied Between VCC and COM
VBS = 15 V,
VIN = 0 V
Applied Between VB(U) - U,
VB(V) - V, VB(W) - W
VCC Under-Voltage Protection Detection Level
VCC Under-Voltage Protection Reset Level
VBS Under-Voltage Protection Detection Level
VBS Under-Voltage Protection Reset Level
VTS
HVIC Temperature Sens-
ing Voltage Output
VCC = 15 V, THVIC = 25°C (2nd Note 4)
VIH
ON Threshold Voltage
Logic HIGH Level
Applied between IN and COM
VIL OFF Threshold Voltage Logic LOW Level
Min Typ Max Unit
- - 200 A
- - 100
7.4 8.0 9.4
8.0 8.9 9.8
7.4 8.0 9.4
8.0 8.9 9.8
600 790 980
- - 2.9
0.8 -
-
A
V
V
V
V
mV
V
V
Bootstrap Diode Part (each bootstrap diode unless otherwise specified.)
Symbol
Parameter
Conditions
VFB Forward Voltage
IF = 0.1 A, TC = 25°C (2nd Note 5)
trrB Reverse Recovery Time IF = 0.1 A, TC = 25°C
Min Typ Max
- 2.5 -
- 80 -
Unit
V
ns
2nd Notes:
1. BVDSS is the absolute maximum voltage rating between drain and source terminal of each MOSFET inside Motion SPM® 5 product. VPN should be sufficiently less than this
value considering the effect of the stray inductance so that VPN should not exceed BVDSS in any case.
2. tON and tOFF include the propagation delay of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field
applications due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the switching time definition with the switching test circuit of Figure 7.
3. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please see Figure 7 for the RBSOA test
circuit that is same as the switching test circuit.
4. Vts is only for sensing-temperature of module and cannot shutdown MOSFETs automatically.
5. Built-in bootstrap diode includes around 15 resistance characteristic. Please refer to Figure 2.
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
4
www.fairchildsemi.com

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Recommended Operating Condition
Symbol
Parameter
Conditions
VPN
VCC
VBS
VIN(ON)
VIN(OFF)
tdead
Supply Voltage
Applied Between P and N
Control Supply Voltage
High-Side Bias Voltage
Input ON Threshold Voltage
Input OFF Threshold Voltage
Applied Between VCC and COM
Applied Between VB and VS
Applied Between IN and COM
Blanking Time for Preventing
Arm-Short
VCC = VBS = 13.5 ~ 16.5 V, TJ 150°C
fPWM PWM Switching Frequency TJ 150°C
Min.
-
13.5
13.5
3.0
0
1.0
-
Typ.
300
15.0
15.0
-
-
-
20
Max.
400
16.5
16.5
VCC
0.6
-
-
Unit
V
V
V
V
V
s
kHz
Built-in Bootstrap Diode V -I Characteristic
FF
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
V [V]
F
Tc=25°C
Figure 2. Built-in Bootstrap Diode Characteristics (Typical)
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
5
www.fairchildsemi.com