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FSB50760SF, FSB50760SFT
Motion SPM® 5 SuperFET® Series
April 2014
Features
• UL Certified No. E209204 (UL1557)
• 600 V RDS(on) = 530 mMaxSuperFET MOSFET 3-
Phase with Gate Drivers and Protection
• Built-in Bootstrap Diodes Simplify PCB Layout
• Separate Open-Source Pins from Low-Side MOS-
FETS for Three-Phase Current-Sensing
• Active-HIGH Interface, Works with 3.3 / 5 V Logic,
Schmitt-trigger Input
• Optimized for Low Electromagnetic Interference
• HVIC Temperature-Sensing Built-in for Temperature
Monitoring
• HVIC for Gate Driving and Under-Voltage Protection
• Isolation Rating: 1500 Vrms / 1 min.
• RoHS Compliant
Applications
• 3-Phase Inverter Driver for Small Power AC Motor
Drives
Related Source
RD-402 - Reference Design for Motion SPM 5 Super-
FET Series
• AN-9082 - Motion SPM5 Series Thermal Performance
by Contact Pressure
• AN-9080 - User’s Guide for Motion SPM 5 Series V2
General Description
The FSB50760SF/SFT is an advanced Motion SPM® 5
module providing a fully-featured, high-performance
inverter output stage for AC Induction, BLDC and PMSM
motors such as refrigerators, fans and pumps. These
modules integrate optimized gate drive of the built-in
MOSFETs(SuperFET® technology) to minimize EMI and
losses, while also providing multiple on-module
protection features including under-voltage lockouts and
thermal monitoring. The built-in high-speed
HVIC requires only a single supply voltage and
translates the incoming logic-level gate inputs to the
high-voltage, high-current drive signals required to
properly drive the module's internal MOSFETs.
Separate open-source MOSFET terminals are available
for each phase to support the widest variety of control
algorithms.
FSB50760SF
Package Marking & Ordering Information
Device
FSB50760SF
FSB50760SFT
Device Marking
50760SF
50760SFT
Package
SPM5P-023
SPM5N-023
FSB50760SFT
Packing Type
Rail
Rail
Quantity
15
15
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
1
www.fairchildsemi.com

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Absolute Maximum Ratings
Inverter Part (each MOSFET unless otherwise specified.)
Symbol
Parameter
Conditions
VDSS
*ID 25
*ID 80
*IDP
*IDRMS
*PD
Drain-Source Voltage of Each MOSFET
Each MOSFET Drain Current, Continuous TC = 25°C
Each MOSFET Drain Current, Continuous TC = 80°C
Each MOSFET Drain Current, Peak
TC = 25°C, PW < 100 s
Each MOSFET Drain Current, Rms
TC = 80°C, FPWM < 20 kHz
Maximum Power Dissipation
TC = 25°C, For Each MOSFET
Rating
600
3.6
2.7
9.4
1.9
14.5
Control Part (each HVIC unless otherwise specified.)
Symbol
Parameter
Conditions
VCC Control Supply Voltage
VBS High-side Bias Voltage
VIN Input Signal Voltage
Applied Between VCC and COM
Applied Between VB and VS
Applied Between IN and COM
Rating
20
20
-0.3 ~ VCC + 0.3
Bootstrap Diode Part (each bootstrap diode unless otherwise specified.)
Symbol
Parameter
Conditions
VRRMB Maximum Repetitive Reverse Voltage
* IFB
* IFPB
Forward Current
Forward Current (Peak)
TC = 25°C
TC = 25°C, Under 1ms Pulse Width
Rating
600
0.5
1.5
Thermal Resistance
Symbol
Parameter
RJC
Junction to Case Thermal Resistance
Conditions
Each MOSFET under Inverter Oper-
ating Condition (1st Note 1)
Rating
8.6
Total System
Symbol
Parameter
TJ
TSTG
Operating Junction Temperature
Storage Temperature
VISO
Isolation Voltage
Conditions
60 Hz, Sinusoidal, 1 Minute, Con-
nect Pins to Heat Sink Plate
Rating
-40 ~ 150
-40 ~ 125
1500
1st Notes:
1. For the measurement point of case temperature TC, please refer to Figure 4.
2. Marking “ * “ is calculation value or design factor.
Unit
V
A
A
A
Arms
W
Unit
V
V
V
Unit
V
A
A
Unit
°C/W
Unit
°C
°C
Vrms
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
2
www.fairchildsemi.com

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Pin descriptions
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Pin Name
COM
VB(U)
VCC(U)
IN(UH)
IN(UL)
N.C
VB(V)
VCC(V)
IN(VH)
IN(VL)
VTS
VB(W)
VCC(W)
IN(WH)
IN(WL)
N.C
P
U, VS(U)
NU
NV
V, VS(V)
NW
W, VS(W)
Pin Description
IC Common Supply Ground
Bias Voltage for U-Phase High-Side MOSFET Driving
Bias Voltage for U-Phase IC and Low-Side MOSFET Driving
Signal Input for U-Phase High-Side
Signal Input for U-Phase Low-Side
No Connection
Bias Voltage for V-Phase High Side MOSFET Driving
Bias Voltage for V-Phase IC and Low Side MOSFET Driving
Signal Input for V-Phase High-Side
Signal Input for V-Phase Low-Side
Output for HVIC Temperature Sensing
Bias Voltage for W-Phase High-Side MOSFET Driving
Bias Voltage for W-Phase IC and Low-Side MOSFET Driving
Signal Input for W-Phase High-Side
Signal Input for W-Phase Low-Side
No Connection
Positive DC-Link Input
Output for U-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Negative DC-Link Input for U-Phase
Negative DC-Link Input for V-Phase
Output for V-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Negative DC-Link Input for W-Phase
Output for W Phase & Bias Voltage Ground for High-Side MOSFET Driving
(1) COM
(2) VB(U)
(3) VCC(U)
(4) IN (UH)
(5) IN (UL)
(6) N.C
(7) VB(V)
(8) VCC(V)
(9) IN (VH)
(10) IN (VL)
(11) VTS
(12) V B(W)
(13) V CC(W)
(14) IN (WH)
(15) IN (WL)
(16) N.C
VCC
HIN
LIN
COM
VB
HO
VS
LO
VCC
HIN
LIN
COM
VTS
VB
HO
VS
LO
VCC
HIN
LIN
COM
VB
HO
VS
LO
(17) P
(18) U, VS(U)
(19) N U
(20) NV
(21) V, VS(V)
(22) N W
(23) W, VS(W)
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
1st Notes:
3. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM® 5 product. External connections should be made as
indicated in Figure 3.
©2012 Fairchild Semiconductor Corporation
FSB50760SF, FSB50760SFT Rev. C6
3
www.fairchildsemi.com