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NCT6102D / NCT6106D
Nuvoton LPC I/O
Date: January 11th, 2012 Revision 1.0

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NCT6102D / NCT6106D
Table of Contents
1. GENERAL DESCRIPTION............................................................................................................ ............... 1
2. FEATURES.................................................................................................................................... ............... 2
3. BLOCK DIAGRAM......................................................................................................................... ............... 5
4. PIN LAYOUT ................................................................................................................................. ............... 6
5. PIN DESCRIPTION ....................................................................................................................... ............... 8
5.1 LPC Interface .................................................................................................................................... 9
5.2 FDC Interface .................................................................................................................................... 9
5.3 Multi-Mode Parallel Port .................................................................................................................. 11
5.4 Serial Port Interface (UART C ~ UART F are for NCT6106D only) ................................................ 13
5.5 KBC Interface .................................................................................................................................. 16
5.6 CIR Interface ................................................................................................................................... 16
5.7 Hardware Monitor Interface............................................................................................................. 16
5.8 Intel® PECI Interface ...................................................................................................................... 17
5.9 Advanced Configuration & Power Interface .................................................................................... 18
5.10 Advanced Sleep State Control Control ........................................................................................... 18
5.11 Port 80 Message Display ................................................................................................................ 18
5.12 SMBus Interface.............................................................................................................................. 19
5.13 Power Pins ...................................................................................................................................... 19
5.14 AMD SB-TSI Interface..................................................................................................................... 19
5.15 Dual Voltage Control ....................................................................................................................... 20
5.16 DSW ................................................................................................................................................ 20
5.17 WatchDog........................................................................................................................................ 20
5.18 IR ..................................................................................................................................................... 20
5.19 SUSPEND LED ............................................................................................................................... 21
5.20 General Purpose I/O Port................................................................................................................ 21
5.20.1 GPIO-0 Interface ....................................................................................................................... 21
5.20.2 GPIO-1 Interface ....................................................................................................................... 21
5.20.3 GPIO-2 Interface ....................................................................................................................... 22
5.20.4 GPIO-3 Interface ....................................................................................................................... 23
5.20.5 GPIO-4 Interface ....................................................................................................................... 24
5.20.6 GPIO-5 Interface ....................................................................................................................... 25
5.20.7 GPIO-6 Interface ....................................................................................................................... 25
5.20.8 GPIO-7 Interface ....................................................................................................................... 26
5.21 Strapping Pins ................................................................................................................................. 26
5.22 Internal pull-up, pull-down pins ....................................................................................................... 27
6. GLUE LOGIC................................................................................................................................. ............. 29
6.1 ACPI Glue Logic.............................................................................................................................. 29
6.2 BKFD_CUT & LATCH_BKFD_CUT ................................................................................................ 31
6.3 3VSBSW# ....................................................................................................................................... 32
6.4 PSON# Block Diagram.................................................................................................................... 33
6.5 PWROK........................................................................................................................................... 34
6.6 Front Panel LEDs ............................................................................................................................ 35
6.6.1 Automatic Mode......................................................................................................................... 35
6.6.2 Manual Mode............................................................................................................................. 36
Publication Release Date: January 11, 2012
-I- version: 1.0

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NCT6102D / NCT6106D
6.6.3 S0~S5 LED Blink Block Diagram .............................................................................................. 36
6.6.4 LED Pole (LED_POL)................................................................................................................ 37
6.6.5 Deeper Sleeping State Detect Function .................................................................................... 38
6.7 Advanced Sleep State Control (ASSC) Function ............................................................................ 40
6.7.1 When ASSC is disabled ............................................................................................................ 40
6.7.2 When ASSC is enabled (Enter into Deeper Sleeping State)..................................................... 41
6.7.3 When ASSC is enabled (Exit Deeper Sleeping State) .............................................................. 41
6.7.4 SLP_S5#_LATCH Control Function .......................................................................................... 42
6.8 Intel DSW Function ......................................................................................................................... 43
6.8.1 Enter DSW State timing diagram .............................................................................................. 43
6.8.2 Exit DSW State timing diagram ................................................................................................. 44
6.8.3 Application Circuit...................................................................................................................... 44
7. CONFIGURATION REGISTER ACCESS PROTOCOL................................................................ ............. 46
7.1 Configuration Sequence.................................................................................................................. 48
7.1.1 Enter the Extended Function Mode........................................................................................... 48
7.1.2 Configure the Configuration Registers ...................................................................................... 48
7.1.3 Exit the Extended Function Mode ............................................................................................. 49
7.1.4 Software Programming Example............................................................................................... 49
8. HARDWARE MONITOR................................................................................................................ ............. 50
8.1 General Description......................................................................................................................... 50
8.2 Access Interfaces ............................................................................................................................ 50
8.3 LPC Interface .................................................................................................................................. 50
8.4 I2C interface..................................................................................................................................... 52
8.5 Analog Inputs .................................................................................................................................. 53
8.5.1 Voltages Over 2.048 V or Less Than 0 V.................................................................................. 54
8.5.2 Voltage Data Format ................................................................................................................. 54
8.5.3 Temperature Data Format ......................................................................................................... 55
8.6 PECI ................................................................................................................................................ 57
8.7 Fan Speed Measurement and Control ............................................................................................ 60
8.7.1 Fan Speed Reading................................................................................................................... 60
8.7.2 Fan Speed Calculation by Fan Count Reading ......................................................................... 60
8.7.3 Fan Speed Calculation by Fan RPM Reading .......................................................................... 60
8.7.4
8.7.5
Fan Speed Control .................................................................................................................... 60
SMART FANTM Control.............................................................................................................. 61
8.7.6 Temperature Source & Reading for Fan Control ...................................................................... 62
8.8 SMART FANTM I............................................................................................................................... 62
8.8.1 Thermal Cruise Mode ................................................................................................................ 62
8.8.2 Speed Cruise Mode................................................................................................................... 64
8.9 SMART FANTM IV & Close Loop Fan Control RPM Mode .............................................................. 66
8.9.1 Step Up Time / Step Down Time............................................................................................... 70
8.9.2 Fan Output Step ........................................................................................................................ 70
8.9.3 Revolution Pulse Selection........................................................................................................ 71
8.9.4 Weight Value Control................................................................................................................. 71
8.10 Alert and Interrupt............................................................................................................................ 73
Publication Release Date: January 11, 2012
-II- version: 1.0

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NCT6102D / NCT6106D
8.10.1 SMI# Interrupt Mode.................................................................................................................. 74
8.10.2 Voltage SMI# Mode ................................................................................................................... 74
8.10.3 Fan SMI# Mode ......................................................................................................................... 74
8.10.4 Temperature SMI# Mode........................................................................................................... 74
8.10.5 OVT# Interrupt Mode................................................................................................................. 80
8.10.6 Caseopen Detection .................................................................................................................. 80
8.11 Power Measurement ....................................................................................................................... 81
9. HARDWARE MONITOR REGISTER SET .................................................................................... ............. 83
9.1 Address Port (Port x5h)................................................................................................................... 83
9.2 Data Port (Port x6h) ........................................................................................................................ 83
9.3 Value RAM Index 00h ~ 6Fh (Bank 0)........................................................................................ 84
9.4 SMIOVT1 Temperature Source (High Byte) Register Index 10h (Bank 0) .................................. 87
9.5 SMIOVT2 Temperature Source (High Byte) Register Index 11h (Bank 0) .................................. 87
9.6 SMIOVT3 Temperature Source (High Byte) Register Index 12h (Bank 0) .................................. 87
9.7 SMIOVT4 Temperature Source (High Byte) Register Index 13h (Bank 0) .................................. 88
9.8 SMIOVT5 Temperature Source (High Byte) Register Index 14h (Bank 0) .................................. 88
9.9 SMIOVT6 Temperature Source (High Byte) Register Index 15h (Bank 0) .................................. 88
9.10 SMIOVT1-6 Temperature Source (Low Byte) Register Index 16h (Bank 0)................................ 88
9.11 System Fan Control Temperature Register (Integer Value)- Index 18h (Bank 0) .......................... 89
9.12 Cpu Fan Control Temperature Register (Integer Value)- Index 19h (Bank 0) ................................ 89
9.13 Aux Fan Control Temperature Register (Integer Value)- Index 1Ah (Bank 0) ................................ 89
9.14
9.15
9.16
9.17
9.18
9.19
9.20
9.21
9.22
9.23
9.24
9.25
9.26
9.27
9.28
9.29
9.30
9.31
9.32
9.33
9.34
9.35
9.36
9.37
Fan Temperature Register (Fractional Value)- Index 1Bh (Bank 0) ............................................... 90
(SYSFANIN) FANIN1 COUNT High-byte Register Index 20h (Bank 0)....................................... 90
(SYSFANIN) FANIN1 COUNT Low-byte Register Index 21h (Bank 0) ....................................... 90
(CPUFANIN) FANIN2 COUNT High-byte Register Index 22h (Bank 0) ...................................... 91
(CPUFANIN) FANIN2 COUNT Low-byte Register Index 23h (Bank 0) ....................................... 91
(AUXFANIN) FANIN3 COUNT High-byte Register Index 24h (Bank 0) ...................................... 91
(AUXFANIN) FANIN3 COUNT Low-byte Register Index 25h (Bank 0) ....................................... 91
Bank Select Register Index 4Eh (Bank 0).................................................................................... 92
PORT 80 DATA INPUT Register Index 4F (Bank 0).................................................................... 92
PCH_CHIP_CPU_MAX_TEMP Register Index 50h (Bank 0) ..................................................... 92
PCH_CHIP_TEMP Register Index 51h (Bank 0) ......................................................................... 93
PCH_CPU_TEMP_H Register Index 52h (Bank 0) .................................................................... 93
PCH_CPU_TEMP_L Register Index 53h (Bank 0) ..................................................................... 93
PCH_MCH_TEMP Register Index 54h (Bank 0) ......................................................................... 93
PCH_DIM0_TEMP Register Index 55h (Bank 0) ......................................................................... 94
PCH_DIM1_TEMP Register Index 56h (Bank 0) ......................................................................... 94
PCH_DIM2_TEMP Register Index 57h (Bank 0) ......................................................................... 94
PCH_DIM3_TEMP Register Index 58h (Bank 0) ......................................................................... 95
PCH_TSI0_TEMP_H Register Index 59h (Bank 0) ..................................................................... 95
PCH_TSI0_TEMP_L Register Index 5Ah (Bank 0)...................................................................... 95
PCH_TSI1_TEMP_H Register Index 5Bh (Bank 0) ..................................................................... 95
PCH_TSI1_TEMP_L Register Index 5Ch (Bank 0) ..................................................................... 96
PCH_TSI2_TEMP_H Register Index 5Dh (Bank 0)..................................................................... 96
PCH_TSI2_TEMP_L Register Index 5Eh (Bank 0)...................................................................... 96
Publication Release Date: January 11, 2012
-III- version: 1.0

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NCT6102D / NCT6106D
9.38
9.39
9.40
9.41
9.42
9.43
9.44
9.45
9.46
9.47
9.48
9.49
9.50
9.51
9.52
9.53
9.54
9.55
9.56
9.57
9.58
9.59
9.60
9.61
9.62
9.63
9.64
9.65
9.66
9.67
9.68
9.69
9.70
9.71
9.72
9.73
9.74
9.75
9.76
9.77
9.78
9.79
9.80
9.81
9.82
9.83
PCH_TSI3_TEMP_H Register Index 5Fh (Bank 0) ..................................................................... 96
PCH_TSI3_TEMP_L Register Index 60h (Bank 0) ...................................................................... 97
PCH_TSI4_TEMP_H Register Index 61h (Bank 0) ..................................................................... 97
PCH_TSI4_TEMP_L Register Index 62h (Bank 0) ...................................................................... 97
PCH_TSI5_TEMP_H Register Index 63h (Bank 0) ..................................................................... 98
PCH_TSI5_TEMP_L Register Index 64h (Bank 0) ...................................................................... 98
PCH_TSI6_TEMP_H Register Index 65h (Bank 0) ..................................................................... 98
PCH_TSI6_TEMP_L Register Index 66h (Bank 0) ...................................................................... 98
PCH_TSI7_TEMP_H Register Index 67h (Bank 0) ..................................................................... 99
PCH_TSI7_TEMP_L Register Index 68h (Bank 0) ...................................................................... 99
ByteTemp_H Register Index 69h (Bank 0) .................................................................................. 99
ByteTemp_L Register Index 6Ah (Bank 0) .................................................................................. 99
Peci Temp Register Index 6Bh (Bank 0).................................................................................... 100
Interrupt Status Register 1 Index 70h (Bank 0).......................................................................... 100
Interrupt Status Register 2 Index 71h (Bank 0).......................................................................... 100
Interrupt Status Register 3 Index 72h (Bank 0).......................................................................... 101
Interrupt Status Register 4 Index 73h (Bank 0).......................................................................... 102
Interrupt Status Register 5 Index 74h (Bank 0).......................................................................... 102
Interrupt Status Register 6 Index 75h (Bank 0).......................................................................... 103
Interrupt Status Register 7 Index 76h (Bank 0).......................................................................... 103
Real Time Status Register 1 Index 77h (Bank 0)....................................................................... 103
Real Time Status Register 2 Index 78h (Bank 0)....................................................................... 104
Real Time Status Register 3 Index 79h (Bank 0)....................................................................... 105
Real Time Status Register 4 Index 7Ah (Bank 0) ...................................................................... 105
Real Time Status Register 5 Index 7Bh (Bank 0) ...................................................................... 106
Real Time Status Register 6 Index 7Ch (Bank 0) ...................................................................... 107
Real Time Status Register 7 Index 7Dh (Bank 0) ...................................................................... 107
Reserved Register Index 7Eh ~ 7Fh (Bank 0) ........................................................................... 108
SMI# Mask Register 1 Index 80h (Bank 0) ................................................................................ 108
SMI# Mask Register 2 Index 81h (Bank 0) ................................................................................ 108
SMI# Mask Register 3 Index 82h (Bank 0) ................................................................................ 109
SMI# Mask Register 4 Index 83h (Bank 0) ................................................................................ 109
SMI# Mask Register 5 Index 84h (Bank 0) ................................................................................ 110
SMI# Mask Register 6 Index 85h (Bank 0) ................................................................................ 110
SMI# Mask Register 7 Index 86h (Bank 0) ................................................................................ 111
CPUVCORE High Limit Voltage Register Index 90h (Bank 0) .................................................. 111
CPUVCORE Low Limit Voltage Register Index 91h (Bank 0) ................................................... 111
VIN0 High Limit Voltage Register Index 92h (Bank 0) ............................................................... 112
VIN1 Low Limit Voltage Register Index 93h (Bank 0)................................................................ 112
AVCC High Limit Voltage Register Index 94h (Bank 0) ............................................................. 112
AVCC Low Limit Voltage Register Index 95h (Bank 0).............................................................. 112
3VCC High Limit Voltage Register Index 96h (Bank 0) ............................................................. 113
3VCC Low Limit Voltage Register Index 97h (Bank 0) .............................................................. 113
VIN1 High Limit Voltage Register Index 98h (Bank 0) ............................................................... 113
VIN1 Low Limit Voltage Register Index 99h (Bank 0)................................................................ 113
VIN2 High Limit Voltage Register Index 9Ah (Bank 0)............................................................... 114
Publication Release Date: January 11, 2012
-IV- version: 1.0