NJU72040.pdf 데이터시트 (총 19 페이지) - 파일 다운로드 NJU72040 데이타시트 다운로드

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NJU72040
Ground Referenced Stereo Headphone Amplifier
„ GENERAL DESCRIPTION
The NJU72040 is an audio headphone amplifier .
Ground-referenced outputs eliminate output coupling
capacitor. The pop noise suppression circuit removes a pop
noise at the power-on and power-off.
It is suitable for audio headphone amplifer application
„ APPLICATIONS
q Audio applications which have audio headphone interface
s PACKAGE OUTLINE
NJU72040V
„ FEATURES
q Operating Voltage
q Operating Current
q Output Coupling Capacitor-less
q Pop Noise Suppression Circuit
q Gain Select
q C-MOS Technology
q Package Outline
+2.7 to +3.6V
IDD=10.5mA typ.
at V+=3.3V, No load, No Signal
SSOP14
„ BLOCK DIAGRAM
inverted
phase
INL-
INL+
V+ Reg
V+ V+
INR-
INR+
inverted
phase
32
Headphone
OUTL
V+
Pop Noise
Suppression
CP
Regulator
CN
Pop Noise
Suppression
OUTR
GND
Bias 3MMUTE
V-
32
Headphone
V+
GAIN 100k
Gain Select
REF
Ver. 1.2E
–1–

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NJU72040
„ PIN CONFIGURATION
INL-
1
INL+
OUTL
V+
CP
CN
GAIN
7
NJU72040
14
INR-
INR+
OUTR
GND
MUTE
V-
REF
8
No. Symbol
Function
1 INL-
Lch Inverted Input
2 INL+
Lch Noninverted Input
3 OUTL
Lch Output
4 V+
V+ Power Supply
5 CP Flying Capacitor Positive Terminal
6 CN Flying Capacitor Negative Terminal
7 GAIN
Gain Select
No. Symbol
Function
8 REF
Reference Voltage Input
9 V-
V- Power Supply
10 MUTE MUTE / Pop Noise Suppression
11 GND
Ground
12 OUTR
Rch Output
13 INR+
Rch Inverted Input
14 INR-
Rch Noninverted Input
–2–

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NJU72040
„ ABSOLUTE MAXIMUM RATING (Ta=25°C)
PARAMETER
SYMBOL
RATING
Supply Voltage
Power Dissipation
Maximum Input Voltage
V+
PD
VIM
+4
SSOP14 : 550(Note1)
V+ +0.3
Operating Temperature Range
Topr
-40 ~ +85
Storage Temperature Range
Tstg
-40 ~ +125
(Note1) EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting
s RECOMMENDED OPERATING CONDITIONS
(Ta=25°C unless otherwise specified)
PARAMETER
SYMBOL
Operating Voltage
V+
TEST CONDITION
MIN.
2.7
UNIT
V
mW
V
°C
°C
TYP. MAX.
3.3 3.6
UNIT
V
„ ELECTRICAL CHARACTERISTICS
(Ta=25°C, V+=3.3V, f=1kHz, Vin=0.1Vrms[differential input], Gv=6.4dB, MUTE=OFF, RL=32unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX. UNIT
Operating Current
Input Resistance1
Input Resistance2
Voltage Gain1
Voltage Gain2
Voltage Gain3
Voltage Gain4
Maximum Output Power1
Maximum Output Power2
Maximum Output Voltage Level
Mute Level
Equivalent Input Noise Voltage
Total Harmonic Distortion1
Total Harmonic Distortion2
Channel Separation1
IDD
Rin1
Rin2
GV1
GV2
GV3
GV4
POMAX1
POMAX2
VOMAX
VMUTE
VNI
THD1
THD2
CS1
No signal, No load
INL-, INR-
INL+, INR+
Gain Terminal=Low
Gain Terminal=High
Gain Terminal=Low, RL=10k
Gain Terminal=High, RL=10k
THD=3%,RL=32
Input=Lch or Rch
THD=3%,RL =32
Input=Lch and Rch
THD=1%, RL=10k
Rg=0, Mute=ON
Rg=0, BW:400Hz-22kHz
BW:400Hz-22kHz, RL=32
BW:400Hz-22kHz, RL=10k
Rg=600,(*1)
- 10.5 15.5
49 61 73
103 129 155
5.4 6.4 7.4
11.4 12.4 13.4
6.6 7.1 7.6
12.6 13.1 13.6
- 80 -
- 55 -
- 2.2 -
- -90 -80
- -100 -95
- 0.08 0.3
- 0.007 0.05
65 75
-
mA
k
k
dB
dB
dB
dB
mW
mW
Vrms
dB
dBV
%
%
dB
Channel Separation2
CS2 Rg=600,f=10kHz,(*1)
55 65
-
dB
Output Offset Voltage
VOS Rg=0,Gv=12.4Db, No load
- 1 5 mV
(*1)OUTL(measured terminal): 20log(OUTR/OUTL) , OUTR(measured terminal): 20log(OUTL/OUTR)
„ CONTROL CHARACTERISTICS
(Ta=25°C, V+=3.3V, Gv=6.4dB, MUTE=OFF, RL=32unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX. UNIT
Mute terminal High
Mute terminal Low
Gain terminal High
Gain terminal Low
MuteH
MuteL
GainH
GainL
Mute=OFF
Mute=ON
Gv=12.4dB
Gv=6.4dB
0.8 V+
-
V+
0 - 0.2 V+
0.8 V+
-
V+
0 - 0.2 V+
V
V
V
V
–3–

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NJU72040
„TEST CIRCUIT (IDD)
V+
INL-
Regulator
C1=1uF
INL+
C2=1uF
OUTL
V+
A
V+
Pop Noise
Suppression
CP
(*2)
C4=1uF
CN
Negative
Voltage
Regulator
GAIN 100k
Gain Select
Pop Noise
Suppression
INR-
C10=1uF
INR+
C8=1uF
OUTR
GND
3MMUTE
Bias
V- (*2)
C6=10uF
REF
(*2): Monolithic Ceramic Capacitors
„TEST CIRCUIT (GV1, GV2, GV3, GV4, POMAX1, VOMAX)
inverted phase INL-
V+
Regulator
C1=1uF
INL+
Gv1,2,POMAX1
RL=32
Gv3,4,VOMAX
RL=10k
C2=1uF
OUTL
V
V+
Pop Noise
Suppression
CP
(*2)
C4=1uF
CN
Negative
Voltage
Regulator
GAIN 100k
Gain Select
(*2): Monolithic Ceramic Capacitors
–4–
Pop Noise
Suppression
INR-
C10=1uF
INR+
C8=1uF
OUTR
GND
3MMUTE
Bias
V- (*2)
C6=10uF
REF
Gv1,2,POMAX1
RL=32
Gv3,4,VOMAX
RL=10k
V+

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„TEST CIRCUIT (POMAX2)
inverted phase INL-
V+
Regulator
C1=1uF
INL+
RL=32
C2=1uF
OUTL
V
V+
Pop Noise
Suppression
CP
(*2)
C4=1uF
CN
Negative
Voltage
Regulator
GAIN 100k
Gain Select
(*2): Monolithic Ceramic Capacitors
„TEST CIRCUIT (VMUTE)
inverted phase INL-
V+
Regulator
C1=1uF
INL+
RL=32
C2=1uF
OUTL
V
V+
Pop Noise
Suppression
CP
(*2)
C4=1uF
CN
Negative
Voltage
Regulator
GAIN 100k
Gain Select
(*2): Monolithic Ceramic Capacitors
NJU72040
Pop Noise
Suppression
INR-
inverted phase
C10=1uF
INR+
C8=1uF
OUTR
RL=32
GND
3MMUTE
Bias
V+
V- (*2)
C6=10uF
REF
Pop Noise
Suppression
INR-
C10=1uF
INR+
C8=1uF
OUTR
GND
3MMUTE
Bias
V- (*2)
C6=10uF
REF
RL=32
–5–