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CS1810xx, CS4961xx, & CM-2
Digital Audio Networking Processor
CobraNet
Silicon Series
CS18100x, CS18101x, CS18102x, and CM-2
CS49610x, CS49611x, and CS49612x
Hardware User’s Manual
Version 2.3
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
©Copyright 2005 Cirrus Logic, Inc.
JUN ’05
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CobraNet Hardware User’s Manual
Table of Contents
Table of Contents
List of Figures......................................................................................................................................... 4
1.0 .Introduction ..................................................................................................................................... 5
2.0 Features ........................................................................................................................................... 6
2.1 CobraNet............................................................................................................................. 6
2.2 CobraNet Interface.............................................................................................................. 6
2.3 Host Interface...................................................................................................................... 7
2.4 Asynchronous Serial Interface ............................................................................................ 7
2.5 Synchronous Serial Audio Interface.................................................................................... 7
2.6 Audio Clock Interface .......................................................................................................... 7
2.7 Audio Routing and Processing............................................................................................ 7
3.0 Hardware.......................................................................................................................................... 8
4.0 Pinout and Signal Descriptions ........................................................................................................ 9
4.1 CS1810xx & CS4961xx Package Pinouts......................................................................... 10
4.1.1 CS1810xx/CS4961xx Pinout............................................................................. 10
4.1.2 CM-2 Connector Pinout..................................................................................... 11
4.2 Signal Descriptions ...........................................................................................................12
4.2.1 Host Port Signals ..............................................................................................12
4.2.2 Asynchronous Serial Port (UART Bridge) Signals ............................................ 12
4.2.3 Synchronous Serial (Audio) Signals.................................................................. 13
4.2.4 Audio Clock Signals .......................................................................................... 13
4.2.5 Miscellaneous Signals....................................................................................... 14
4.2.6 Power and Ground Signals ............................................................................... 14
4.2.7 System Signals ................................................................................................. 15
4.3 Characteristics and Specifications .................................................................................... 16
4.3.1 Absolute Maximum Ratings .............................................................................. 16
4.3.2 Recommended Operating Conditions ............................................................... 16
4.3.3 Digital DC Characteristics ................................................................................. 16
4.3.4 Power Supply Characteristics ........................................................................... 16
5.0 Synchronization.............................................................................................................................. 17
5.1 Synchronization Modes..................................................................................................... 17
5.1.1 Internal Mode .................................................................................................... 18
5.1.2 External Word Clock Mode ............................................................................... 18
5.1.3 External Master Clock Mode ............................................................................. 18
6.0 Digital Audio Interface .................................................................................................................... 19
6.1 Digital Audio Interface Timing ........................................................................................... 20
6.1.1 Normal Mode Data Timing ................................................................................ 21
6.1.2 I2S Mode Data Timing....................................................................................... 21
6.1.3 Standard Mode Data Timing ............................................................................. 22
7.0 Host Management Interface (HMI)................................................................................................. 23
7.1 Hardware........................................................................................................................... 23
7.4 Protocol and Messages..................................................................................................... 28
7.4.1 Messages.......................................................................................................... 28
7.4.1.1. Translate Address ................................................................................. 29
7.4.1.2. Interrupt Acknowledge........................................................................... 29
7.4.1.3. Goto Packet........................................................................................... 29
7.4.1.4. Goto Translation .................................................................................... 29
7.4.1.5. Packet Received ................................................................................... 30
7.4.1.6. Packet Transmit .................................................................................... 30
7.4.1.7. Goto Counters ....................................................................................... 30
7.4.2 Status ................................................................................................................ 31
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Table of Contents
CobraNet Hardware User’s Manual
7.4.3 Data................................................................................................................... 32
7.4.3.1. Region length ........................................................................................ 32
7.4.3.2. Writable Region ..................................................................................... 32
7.4.3.3. Translation Complete ............................................................................ 32
7.4.3.4. Packet Transmission Complete............................................................. 32
7.4.3.5. Received Packet Available .................................................................... 32
7.4.3.6. Message Togglebit ................................................................................ 32
8.0 HMI Reference Code ..................................................................................................................... 33
8.1 HMI Definitions.................................................................................................................. 33
8.2 HMI Access Code ............................................................................................................. 34
8.3 CM-1, CM-2 Auto-detection ..............................................................................................36
9.0 Mechanical Drawings and Schematics .......................................................................................... 37
9.1 CM-2 Mechanical Drawings ..............................................................................................38
9.2 CM-2 Schematics.............................................................................................................. 44
9.3 CS1810xx/CS4961xx Package ......................................................................................... 51
9.4 Temperature Specifications ..............................................................................................52
10.0 Ordering Information .................................................................................................................... 53
10.1 Device Part Numbers ...................................................................................................... 53
10.2 Device Part Numbering Scheme..................................................................................... 53
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CobraNet Hardware User’s Manual
List of Figures
List of Figures
Figure 1. CobraNet Data Services ......................................................................................................... 5
Figure 2. CobraNet Interface Hardware Block Diagram......................................................................... 8
Figure 3. Audio Clock Sub-system....................................................................................................... 17
Figure 4. Channel Structure for Synchronous Serial Audio at 64FS (One Sample Period) -
CS18100x/CS49610x & CS18101x/CS49611x ............................................................ 19
Figure 5. Channel Structure for Synchronous Serial Audio at 128FS (One Sample Period) -
CS18102x/CS49612x ................................................................................................... 19
Figure 6. Timing Relationship between FS512_OUT, DAO1_SCLK and FS1..................................... 20
Figure 7. Serial Port Data Timing Overview......................................................................................... 20
Figure 8. Audio Data Timing Detail - Normal Mode, 64FS -
CS18100x/CS49610x, CS18101x/CS49611x .............................................................. 21
Figure 9. Audio Data Timing Detail - Normal Mode, 128FS -
CS18102x/CS49612x ................................................................................................... 21
Figure 10. Audio Data Timing Detail - I2S Mode, 64FS -
CS18100x/CS49610x, CS18101x/CS49611x .............................................................. 21
Figure 11. Audio Data Timing Detail - I2S Mode, 128FS -
CS18102x & CS49612x................................................................................................ 21
Figure 12. Audio Data Timing Detail - Standard Mode, 64FS -
CS18100x/CS49610x, CS18101x/CS49611x .............................................................. 22
Figure 13. Audio Data Timing Detail - Standard Mode, 128FS -
CS18102x/CS49612x ................................................................................................... 22
Figure 14. Host Port Read Cycle Timing - Motorola Mode .................................................................. 25
Figure 15. Host Port Write Cycle Timing - Motorola Mode................................................................... 25
Figure 16. Parallal Control Port - Intel Mode Read Cycle .................................................................... 27
Figure 17. Parallel Control Port - Intel Mode Write Cycle .................................................................... 27
Figure 18. CM-2 Module Assembly Drawing, Top ............................................................................... 38
Figure 19. CM-2 Module Assembly Drawing, Bottom .......................................................................... 39
Figure 20. General PCB Dimensions ................................................................................................... 40
Figure 21. Example Configuration, Side View...................................................................................... 41
Figure 22. Faceplate Dimensions ........................................................................................................ 42
Figure 23. Connector Detail ................................................................................................................. 43
Figure 24. CM-2 RevF Schematic Page 1 of 7 .................................................................................... 44
Figure 25. CM-2 RevF Schematic Page 2 of 7 .................................................................................... 45
Figure 26. CM-2 RevF Schematic Page 3 of 7 .................................................................................... 46
Figure 27. CM-2 RevF Schematic Page 4 of 7 .................................................................................... 47
Figure 28. CM-2 RevF Schematic Page 5 of 7 .................................................................................... 48
Figure 29. CM-2 RevF Schematic Page 6 of 7 .................................................................................... 49
Figure 30. CM-2 RevF Schematic Page 7 of 7 .................................................................................... 50
Figure 31. 144-Pin LQFP Package Drawing ........................................................................................ 51
Figure 32. Device Part Numbering Explanation ................................................................................... 53
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CobraNet Hardware User’s Manual
Introduction
1.0
Introduction
This document is intended to help hardware designers integrate the CobraNetTM interface
into an audio system design. It covers the CS18100x, CS18101x, CS18102x, CS49610x,
CS49611x, and CS49612x members of the CobraNetTM Silicon Series of devices, where
“x” is the ROM version (ROM ID). This document also describes the CM-2 module with
schematics, mechanical drawings, etc.
CobraNet is a combination of hardware (the CobraNet interface), network protocol, and
firmware. CobraNet operates on a switched Ethernet network and provides the following
additional communications services.
• Isochronous (Audio) Data Transport
• Sample Clock Distribution
• Control and Monitoring Data Transport
The CobraNet interface performs synchronous-to-isochronous and isochronous-to-
synchronous conversions as well as the data formatting required for transporting real-time
digital audio over the network.
The CobraNet interface has provisions for carrying and utilizing control and monitoring
data such as Simple Network Management Protocol (SNMP) through the same network
connection as the audio. Standard data transport capabilities of Ethernet are shown here
as unregulated traffic. Since CobraNet is Ethernet based, in most cases, data
communications and CobraNet applications can coexist on the same physical network.
Figure 1 illustrates the different data services available through the CobraNet system.
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Figure 1. CobraNet Data Services
©Copyright 2005 Cirrus Logic, Inc.
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