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®
Integrated Device Technology, Inc.
FAST CMOS
OCTAL D FLIP-FLOP
WITH CLOCK ENABLE
IDT54/74FCT377
IDT54/74FCT377A
IDT54/74FCT377C
FEATURES:
• IDT54/74FCT377 equivalent to FASTspeed
IDT54/74FCT377A 25% faster than FAST
IDT54/74FCT377C 40% faster than FAST
• Equivalent to FAST output drive over full temperature
and voltage supply extremes
• IOL = 48mA (commercial) and 32mA (military)
• IIH and IIL only 5µA max.
• CMOS power levels (1mW typ. static)
• CMOS output level compatible
• Meets or exceeds JEDEC Standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT377/A/C is an octal D flip-flop built using
an advanced dual metal CMOS technology. The IDT54/
74FCT377/A/C have eight edge-triggered, D-type flip-flops
with individual D inputs and O outputs. The common buffered
Clock (CP) input loads all flip-flops simultaneously when the
Clock Enable (CE) is LOW. The register is fully edge-
triggered. The state of each D input, one set-up time before
the LOW-to-HIGH clock transition, is transferred to the corre-
sponding flip-flop’s O output. The CE input must be stable only
one set-up time prior to the LOW-to-HIGH clock transition for
predictable operation.
FUNCTIONAL BLOCK DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
CE
DQ
CP
DQ
CP
CP
O0
PIN CONFIGURATIONS
O1
DQ
CP
O2
DQ
CP
O3
CE
O0
D0
D1
O1
O2
D2
D3
O3
GND
1 20
2 19
3 18
4 P20-1 17
5
D20-1
SO20-2
16
6 & 15
7 E20-1 14
8 13
9 12
10 11
Vcc
O7
D7
D6
O6
O5
D5
D4
O4
CP
DIP/SOIC/CERPACK
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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992 Integrated Device Technology, Inc.
7.14
DQ
CP
DQ
CP
DQ
CP
DQ
CP
O4 O5 O6 O7
2535 drw 02
INDEX
32
20 19
D1 4
1 18 D7
O1 5
17 D6
O2 6 L20-2 16 O6
D2 7
15 O5
D3 8
14 D5
9 10 11 12 13
2535 drw 01
LCC
TOP VIEW
MAY 1992
DSC4606/2
1

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IDT54/74FCT377/A/C
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
Description
D0–D7
CE
Data Inputs
Clock Enable (Active LOW)
O0–O7
Data Outputs
CP Clock Pulse Input
2535 tbl 01
FUNCTION TABLE(1)
Operating Mode
Inputs
CP CE
D
Outputs
O
Load “1”
lh
H
Load “0”
l
l
L
Hold (Do Nothing)
h X No Change
H H X No Change
NOTE:
2535 tbl 02
1. H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH
Clock Transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the LOW-to-HIGH Clock
transition
X = Immaterial
= LOW-to-HIGH clock transition
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
VTERM(2) Terminal Voltage
with Respect
to GND
VTERM(3) Terminal Voltage
with Respect
to GND
Commercial Military Unit
–0.5 to +7.0 –0.5 to +7.0 V
–0.5 to VCC –0.5 to VCC V
TA Operating
Temperature
0 to +70 –55 to +125 °C
TBIAS
Temperature
Under Bias
–55 to +125 –65 to +135 °C
TSTG
Storage
Temperature
–55 to +125 –65 to +150 °C
PT Power Dissipation
0.5
0.5 W
IOUT
DC Output Current
120
120 mA
NOTES:
2535 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input
VIN = 0V
6 10 pF
Capacitance
COUT Output
VOUT = 0V 8 12 pF
Capacitance
NOTE:
1. This parameter is guaranteed but not tested.
2535 tbl 04
7.14 2

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IDT54/74FCT377/A/C
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2)
Max.
VIH Input HIGH Level
Guaranteed Logic HIGH Level
2.0 — —
VIL Input LOW Level
Guaranteed Logic LOW Level
— — 0.8
IIH Input HIGH Current VCC = Max.
IIL Input LOW Current
VI =VCC
VI = 2.7V
VI = 0.5V
— —5
— — 5(4)
— — –5(4)
VI = GND
— — –5
VIK
Clamp Diode Voltage
VCC = Min., IN = –18mA
IOS
Short Circuit Current
VCC = Max.(3), VO = GND
— –0.7 –1.2
–60
–120
VOH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µA
VHC
VCC
VCC = Min.
IOH = –300µA
VHC
VCC
VIN = VIH or VIL
IOH = –12mA MIL.
2.4
4.3 —
IOH = –15mA COM’L. 2.4
4.3 —
VOL Output LOW Voltage VCC = 3V, VIN = VLC or VHC, IOL = 300µA
VCC = Min.
IOL = 300µA
— GND VLC
— GND VLC(4)
VIN = VIH or VIL
IOL = 32mA MIL.
— 0.3 0.5
IOL = 48mA COM’L.
0.3 0.5
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
Unit
V
V
µA
V
mA
V
V
2535 tbl 05
7.14 3

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IDT54/74FCT377/A/C
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
ICC Quiescent Power Supply VCC = Max.
Current
VIN VHC; VIN VLC
— 0.2 1.5
ICC
Quiescent Power Supply
Current TTL Inputs HIGH
Vcc = Max.
VIN = 3.4V(3)
— 0.5 2.0
ICCD
Dynamic Power Supply
Current(4)
Vcc = Max.
Outputs Open
CE = GND
One Input Toggling
50% Duty Cycle
VIN VHC
VIN VLC
— 0.15 0.25
IC Total Power Supply
Current(6)
Vcc = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
CE = GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
CE = GND
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
VIN VHC
VIN VLC
(FCT)
VIN = 3.4V
VIN = GND
VIN VHC
VIN VLC
(FCT)
VIN = 3.4V
VIN = GND
— 1.7 4.0
— 2.2 6.0
— 4.0 7.8(5)
— 6.2 16.8(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
Unit
mA
mA
mA/
MHz
mA
2535 tbl 06
7.14 4

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IDT54/74FCT377/A/C
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT377
IDT54/74FCT377A
IDT54/74FCT377C
Symbol
Parameter
Com’l.
Mil.
Com’l. Mil. Com’l. Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay CL = 50pF 2.0 13.0 2.0 15.0 2.0 7.2 2.0 8.3 2.0
tPHL CP to On
RL = 500
tSU Set-up Time
HIGH or LOW
Dn to CP
2.5 — 3.0 — 2.0 — 2.0 — 2.0
tH Hold Time
HIGH or LOW
Dn to CP
2.0 — 2.5 — 1.5 — 1.5 — 1.5
tSU Set-up Time
HIGH or LOW
CE to CP
4.0 — 4.0 — 3.5 — 3.5 — 3.5
tH Hold Time
HIGH or LOW
CE to CP
1.5 — 1.5 — 1.5 — 1.5 — 1.5
tW Clock Pulse Width,
HIGH or LOW
7.0 — 7.0 — 6.0 — 7.0 — 6.0
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5.2 2.0 5.5 ns
— 2.0 — ns
— 1.5 — ns
— 3.5 — ns
— 1.5 — ns
— 7.0 — ns
2535 tbl 07
7.14 5