SSM04N70BGP-A.pdf 데이터시트 (총 7 페이지) - 파일 다운로드 SSM04N70BGP-A 데이타시트 다운로드

No Preview Available !

SSM04N70BGP-A
N-channel Enhancement-mode Power MOSFET
PRODUCT SUMMARY
BVDSS
650V
R DS(ON)
2.4
I D 4A
Pb-free; RoHS-compliant TO-220
G
D
S
TO-220 (suffix P)
DESCRIPTION
The SSM04N70BGP-A achieves fast switching performance
with low gate charge without a complex drive circuit. It
is suitable for high voltage applications such as AC/DC
converters, SMPS and general off-line switching circuits.
The SSM04N70BGP-A is in TO-220 for through-hole
mounting where a small footprint is required on the board,
and/or an external heatsink is to be attached.
These devices are manufactured with an advanced process,
providing improved on-resistance and switching performance.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
VGS
ID
IDM
PD
EAS
IAR
EAR
TSTG
TJ
Drain-source voltage
Gate-source voltage
Continuous drain current, TC = 25°C
Pulsed drain current1
TC = 100°C
Total power dissipation, TC = 25°C
Linear derating factor
Single pulse avalanche energy3
Avalanche current
Repetitive avalanche energy
Storage temperature range
Operating junction temperature range
THERMAL CHARACTERISTICS
Symbol
Parameter
RΘJC
RΘJA
Maximum thermal resistance, junction-case
Maximum thermal resistance, junction-ambient
Notes:
1. Pulse width must be limited to avoid exceeding the safe operating area.
2. Pulse width <300us, duty cycle <2%.
3. Starting Tj = 25°C, VDD=50V , L=25mH , RG=25, IAS= 4A.
9/29/2006 Rev.3.1
www.SiliconStandard.com
Value
650
±30
4
2.5
15
62.5
0.5
100
4
4
-55 to 150
-55 to 150
Value
2
62
Units
V
V
A
A
A
W
W/°C
mJ
A
mJ
°C
°C
Units
°C/W
°C/W
1 of 7

No Preview Available !

SSM04N70BGP-A
ELECTRICAL CHARACTERISTICS (at Tj = 25°C, unless otherwise specified)
Symbol
BVDSS
BV DSS/Tj
RDS(ON)
Parameter
Drain-source breakdown voltage
Breakdown voltage temperature coefficient
Static drain-source on-resistance
Test Conditions
VGS=0V, ID= 1mA
Reference to 25°C, ID=1mA
VGS=10V, ID=2A
Min. Typ. Max. Units
650 - - V
- 0.6 - V/°C
- - 2.4
VGS(th)
gfs
IDSS
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Gate threshold voltage
Forward transconductance
Drain-source leakage current
Gate-source leakage current
Total gate charge 2
Gate-source charge
Gate-drain ("Miller") charge
Turn-on delay time 2
Rise time
Turn-off delay time
Fall time
Input capacitance
Output capacitance
Reverse transfer capacitance
VDS=VGS, ID=250uA
VDS=20V, ID=1A
VDS=600V, VGS=0V
VDS=480V ,VGS=0V, Tj = 150°C
VGS30V
ID=4A
VDS=480V
VGS=10V
VDS=300V
ID=4A
RG=10, VGS=10V
RD=75
VGS=0V
VDS=25V
f=1.0MHz
2 - 4V
- 2.5 -
S
- - 10 uA
- - 100 uA
- - ±100 nA
- 16.7 - nC
- 4.1 - nC
- 4.9 - nC
- 11 - ns
- 8.3 - ns
- 23.8 - ns
- 8.2 - ns
- 950 - pF
- 65 - pF
- 6 - pF
Source-Drain Diode
Symbol
VSD
IS
I SM
Parameter
Forward voltage 2
Continuous source current (body diode)
Pulsed source current (body diode)1
Test Conditions
IS= 4A, VGS=0V
VD=VG=0V , VS=1.3V
Min. Typ. Max. Units
- - 1.5 V
- - 4A
- - 15 A
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
9/29/2006 Rev.3.1
www.SiliconStandard.com
2 of 7

No Preview Available !

SSM04N70BGP-A
2.5
T C =25 o C
2
1.5
1
V G =10V
V G =6.0V
V G =5.0V
V G =4.5V
0.5 V G =4.0V
0
01234567
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
2
T C =150 o C
1.5
1
V G =10V
V G =6.0V
V G =5.0V
V G =4.5V
V G =4.0V
0.5
V G =3.5V
0
0 2 4 6 8 10 12
V DS , Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
1.2
1.1
1
0.9
0.8
-50
0 50 100
T j , Junction Temperature ( o C)
150
Fig 3. Normalized BVDSS vs. Junction
Temperature
2.5 I D =2A
V G =10V
2
1.5
1
0.5
0
-50 0 50 100 150
T j , Junction Temperature ( o C )
Fig 4. Normalized On-Resistance
vs. Junction Temperature
9/29/2006 Rev.3.1
www.SiliconStandard.com
3 of 7

No Preview Available !

SSM04N70BGP-A
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
25
50 75 100 125
T c , Case Temperature ( o C )
150
Fig 5. Maximum Drain Current vs.
Case Temperature
40
20
0
0 50 100 150
T c , Case Temperature ( o C )
Fig 6. Typical Power Dissipation
100
10
1
0.1
0.01
1
T c =25 o C
Single Pulse
10
100
V DS (V)
10us
100us
1ms
10ms
100ms
1000
10000
Fig 7. Maximum Safe Operating Area
1
DUTY=0.5
0.2
0.1
0.1
0.05
0.02
0.01
SINGLE PULSE
PDM
t
T
Duty factor = t/T
Peak Tj = PDM x Rthjc + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t , Pulse Width (s)
Fig 8. Effective Transient Thermal Impedance
9/29/2006 Rev.3.1
www.SiliconStandard.com
4 of 7

No Preview Available !

SSM04N70BGP-A
16
I D =4A
14
12 V DS =320V
V DS =400V
10 V DS =480V
8
6
4
2
0
0 5 10 15 20
Q G , Total Gate Charge (nC)
25
Fig 9. Gate Charge Characteristics
f=1.0MHz
10000
Ciss
100
Coss
Crss
1
1 6 11 16 21 26 31
V DS (V)
Fig 10. Typical Capacitance Characteristics
100
10
T j =150 o C
1
T j = 25 o C
0.1
0
0.2 0.4 0.6 0.8
1
V SD (V)
1.2 1.4 1.6
Fig 11. Forward Characteristic of
Reverse Diode
5
4
3
2
1
0
-50 0
50 100 150
T j , Junction Temperature ( o C )
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
9/29/2006 Rev.3.1
www.SiliconStandard.com
5 of 7