74HCT4017.pdf 데이터시트 (총 23 페이지) - 파일 다운로드 74HCT4017 데이타시트 다운로드

No Preview Available !

74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
Rev. 5 — 3 February 2016
Product data sheet
1. General description
The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded
outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs
(CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is
advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a
HIGH-to-LOW transition at CP1 while CP0 is HIGH. When cascading counters, the Q5-9
output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive
the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 =
HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP1). Automatic code
correction of the counter is provided by an internal circuit: following any illegal code the
counter returns to a proper counting mode within 11 clock pulses. Inputs include clamp
diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of VCC.
2. Features and benefits
Wide supply voltage range from 2.0 V to 6.0 V
Input levels:
For 74HC4017: CMOS level
For 74HCT4017: TTL level
Complies with JEDEC standard no. 7 A
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C

No Preview Available !

NXP Semiconductors
74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC4017
74HC4017D
40 C to +125 C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC4017DB
40 C to +125 C SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HC4017PW
40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
74HC4017BQ
40 C to +125 C
DHVQFN16 plastic dual in-line compatible thermal-enhanced SOT763-1
very thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
74HCT4017
74HCT4017D
40 C to +125 C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT4017BQ
40 C to +125 C
DHVQFN16 plastic dual in-line compatible thermal-enhanced SOT763-1
very thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
4. Functional diagram
 &3
 &3
 05
Fig 1. Functional diagram
67$*(-2+1621&2817(5
'(&2',1*$1'287387&,5&8,75<
4 
4 4 4 4 4 4 4 4 4 4
          DDK
74HC_HCT4017
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 3 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 23

No Preview Available !

NXP Semiconductors
 &3
 &3
 05
Fig 2. Logic symbol
4
4
4
4
4
4
4
4
4
4
4
DDK











74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs


&75',9'(&




 &7 


 




 
&7• 
Fig 3. IEC logic symbol
DDK
' 4
'4
'4
'4
'4
&3 )) )) )) )) ))

&3
&3 4
&3 4
&3 4
&3 4
&3 4
5' 5' 5' 5' 5'
05
4 4 4 4 4 4 4 4 4 4 4
DDK
Fig 4. Logic diagram
74HC_HCT4017
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 3 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 23

No Preview Available !

NXP Semiconductors
&3,1387
&3,1387
05,1387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
Fig 5. Timing diagram
74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
DDK
74HC_HCT4017
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 3 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
4 of 23

No Preview Available !

NXP Semiconductors
5. Pinning information
5.1 Pinning
4 
4 
4 
4 
4 
4 
4 
*1' 
+&
+&7
 9&&
 05
 &3
 &3
 4
 4
 4
 4
DDK
Fig 6. Pin configuration SO16 and (T)SSOP16
5.2 Pin description
Table 2.
Symbol
Q[0:9]
GND
Q5-9
CP1
CP0
MR
VCC
Pin description
Pin
3, 2, 4, 7, 10, 1, 5, 6, 9, 11
8
12
13
14
15
16
74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
WHUPLQDO
LQGH[DUHD
+&
+&7
4 
4 
4 
4 
4 
4 
*1' 
 05
 &3
 &3
 4
 4
 4
DDK
7UDQVSDUHQWWRSYLHZ
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 7. Pin configuration DHVQFN16
Description
decoded output
ground (0 V)
carry output (active LOW)
clock input (HIGH-to-LOW edge-triggered)
clock input (LOW-to-HIGH edge-triggered)
master reset input (active HIGH)
supply voltage
74HC_HCT4017
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 3 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 23