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a
FEATURES
High Gain: 200 V/mV typ
Single or Dual Supply Operation
Input Voltage Range Includes Ground
Low Power Consumption (1.5 mW/Comparator)
Low Input Bias Current: 100 nA max
Low Input Offset Current: 10 nA max
Low Offset Voltage: 1 mV max
Low Output Saturation Voltage: 250 mV @ 4 mA
Logic Output Compatible with TTL, DTL, ECL, MOS and
CMOS
Directly Replaces LM139/239/339 Comparators
Available in Die Form
Quad Low Power,
Precision Comparator
CMP04
PIN CONNECTIONS
14-Lead Cerdip
14-Lead Plastic DIP
14-Lead SOIC
OUT 2 1
OUT 1 2
V+ 3
IN 1– 4
IN 1+ 5
IN 2– 6
IN 2+ 7
14
23
CMP04
14 OUT 3
13 OUT 4
12 GND
11 IN 4+
10 IN 4–
9 IN 3+
8 IN 3–
GENERAL DESCRIPTION
Four precision independent comparators comprise the CMP04.
Performance highlights include a very low offset voltage, low
output saturation voltage and high gain in a single supply de-
sign. The input voltage range includes ground for single supply
operation and V– for split supplies. A low power supply current
of 2 mA, which is independent of supply voltage, makes this the
preferred comparator for precision applications requiring mini-
mal power consumption. Maximum logic interface flexibility is
offered by the open-collector TTL output.
V+
3.5A
+INPUT
Q1
*
Q2
Q5
*SUBSTRATE DIODES
100A
Q3
Q6
3.5A
100A
Q8
OUTPUT
Q4 –INPUT
Q7 *
Figure 1. Simplified Schematic (1/4 CMP04)
TYPICAL INTERFACE
5.0
3
1/4
CMP04
12
100k
1/4
CD4011
Figure 2a. Driving CMOS
5.0
3
1/4
CMP04
12
10k
1/4 SN7400
Figure 2b. Driving TTL
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998

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CMP04–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V+ = +5 V, TA = +25؇C, unless otherwise noted)
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Voltage Gain
Large-Signal Response Time
Symbol
VOS
IOS
IB
AV
tr
Small-Signal Response Time
tr
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Saturation Voltage
Output Sink Current
Output Leakage Current
Supply Current
CMVR
CMRR
PSRR
VOL
ISINK
ILEAK
I+
Conditions
RS = 0 , RL = 5.1 k, VO = 1.4 V1
IIN(+) – IIN(–), RL = 5.1 k, VO = 1.4 V
IIN(+) or IIN(–)
RL 15 k, V+ = 15 V2
VIN = TTL Logic Swing, VREF = 1.4 V3
VRL = 5 V, RL = 5.1 k
VIN = 100 mV Step3, 5 mV Overdrive
VRL = 5 V, RL = 5.1 k
(Note 4)
(Notes 2, 5)
V+ = +5 V to +18 V2
VIN(–) 1 V, VIN(+) = 0, ISINK 4 mA
VIN(–) 1 V, VIN(+) = 0, VO 1.5 V
VIN(+) 1 V, VIN(–) = 0, VO = 30 V
RL = , All Comps V+ = 30 V
Min Typ Max
0.4 1
2 10
25 100
80 200
Units
mV
nA
nA
V/mV
300 ns
1.3 µs
0 V+ –1.5 V
80 100
dB
80 100
dB
250 400
mV
6 16
mA
0.1 100
nA
0.8 2.0
mA
NOTES
1At output switch point, VO = 1.4 V, RS = 0 with V+ from 5 V; and over the full input common-mode range (0 V to V+ –1.5 V).
2Guaranteed by design.
3Sample tested.
4The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range
is V+ –1.5 V, but either or both inputs can go to +30 V without damage.
5RL 15 k, V+ = 15 V, VCM = 1.5 V to 13.5 V.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .36 V or ± 18 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 36 V dc
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +36 V
Operating Temperature Range
CMP04BY . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
CMP04FP, FS . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature (TJ) . . . . . . . . . . . . . –65°C to +150°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
(P Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Input Current (VIN < –3.0 V) . . . . . . . . . . . . . . . . . . . 50 mA
Output Short-Circuit to GND . . . . . . . . . . . . . . . . Continuous
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
Package Type
14-Lead Hermetic DIP (Y)
14-Lead Plastic DIP (P)
14-Lead SOIC
JA2
94
83
120
JC Units
10 °C/W
39 °C/W
36 °C/W
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted. Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2θJA is specified for worst case mounting conditions, i.e., θJA is specified for device
in socket for cerdip and plastic DIP packages; θJA is specified for device soldered
to printed circuit board for SO package.
ORDERING GUIDE
Model
CMP04BY/883C
CMP04FP
CMP04FS
TA = +25؇C
VOS
1 mV
1 mV
1 mV
Temperature
Ranges
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
Package
Descriptions
Package
Options
14-Lead Cerdip
Q-14
14-Lead Plastic DIP N-14
14-Lead SOIC
R-14/SO-14
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the CMP04 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–2– REV. C

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CMP04
ELECTRICAL CHARACTERISTICS (@ V+ = +5 V, –55؇C TA +125؇C for CMP04BY, –40؇C TA +85؇C for
CMP04FP/FS, unless otherwise noted)
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Voltage Gain
Large-Signal Response Time
Small-Signal Response Time
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Saturation Voltage
Output Sink Current
Output Leakage Current
Supply Current
Symbol
VOS
IOS
IB
AV
tr
tr
CMVR
CMRR
PSRR
VOL
ISINK
ILEAK
I+
Conditions
RS = 0 , RL = 5.1 k
VO = 1.4 V2
IIN(+) – IIN(–)
RL = 5.1 k
VO = 1.4 V
IIN(+) or IIN(–)
RL 15 k, V+ = 15 V3
VIN = TTL Logic Swing
VREF = 1.4 V4
VRL = 5 V, RL = 5.1 k
VIN = 100 mV Step4
5 mV Overdrive
VRL = 5 V, RL = 5.1 k
(Note 5)
(Notes 1, 3)
V+ = +5 V to +18 V
VIN(–) 1 V, VIN(+) = 0,
ISINK 4 mA
VIN(–) 1 V,
VIN(+) = 0, VO 1.5 V
VIN(+) 1 V,
VIN(–) = 0, VO = 30 V
RL = , All Comps
V+ = 30 V
CMP04B/F1
Min Typ
1
1
4
4
4
40
70 125
300
300
300
1.3
1.3
1.3
0
60 100
80 100
250
250
5 16
5 16
0.1
0.1
1.2
1.2
Max
2
2
20
20
20
200
V+ –1.5
700
700
200
200
3.0
3.0
Units
mV
mV
nA
nA
nA
nA
V/mV
ns
ns
ns
µs
µs
µs
V
dB
dB
mV
mV
mA
mA
nA
nA
mA
mA
NOTES
1RL 15 k, V+ = 15 V, VCM = 1.5 V to 13.5 V.
2At output switch point, VO = 1.4 V, RS = 0 with V+ from 5 V; and over the full input common-mode range (0 V to V+ –1.5 V).
3Guaranteed by design.
4Sample tested.
5The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode
voltage range is V+ –1.5 V, but either or both inputs can go to +30 V without damage.
Specifications subject to change without notice.
–18V
100k
+18V
ONE EACH
PER BOARD
3.6k
14
3.6k
13 12
11
4
CMP04
3
1
3.6k
23
3.6k
4
ZENER
5.8V TO 6.2V
1 WATT
470k
10 9
1
2
56
8
7
–18V
+18V
+30V
TO ADJACENT SOCKETS
MIL-STD-883, METHOD 1015, CONDITION B
Figure 3. Burn-In Circuit
REV. C
–3–

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CMP04
DICE CHARACTERISTICS
DIE SIZE 0.058 × 0.055 inch, 3190 sq. mils
(1.47 × 1.40 mm, 2.058 sq. mm)
WAFER TEST LIMITS (@ V+ = +5 V, TA = +25؇C, unless otherwise noted)
Parameter
Symbol
Conditions
CMP04N
Limit
CMP04G
Limit
Units
Input Offset Voltage
Input Offset Current
Input Bias Current
Voltage Gain
Input Voltage Range
VOS
IOS
IB
AV
CMVR
RS = 0 , RL = 5.1 k
VO = 1.4 V1
IIN(+) – IIN(–)
RL = 5.1 k
VO = 1.4 V
IIN(+) or IIN(–)1
RL 15 k, V+ = 15 V3
(Notes 2, 3)
1
10
100
80
V+ –1.5
2
25
100
50
V+ –1.5
mV max
nA max
nA max
V/mV min
V max
Common-Mode Rejection Ratio
CMRR
(Note 4)
80 80 dB min
Power Supply Rejection Ratio
PSRR
V+ = +5 V to +18 V
80
80
dB min
Saturation Voltage
Output Sink Current
Output Leakage Current
Supply Current
VOL VIN(–) 1 V, VIN(+) = 0,
ISINK 4 mA
400 400 mV max
ISINK
VIN(–) 1 V,
VIN(+) = 0, VO 1.5 V
6
6
mA min
ILEAK
VIN(+) 1 V,
VIN(–) = 0, VO = 30 V
100
100
nA max
I+ RL = , All Comps
V+ = 30 V
2 2 mA max
NOTES
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
TYPICAL ELECTRICAL CHARACTERISTICS (@ V+ = +5 V, unless otherwise noted)
Parameter
Symbol
Conditions
CMP04N
Typical
CMP04G
Typical
Large-Signal Response Time
Small-Signal Response Time
tr
tr
VIN = TTL Logic Swing
VREF = 1.4 V5
VRL = 5 V, RL = 5.1 k
VIN = 100 mV Step5
5 mV Overdrive
VRL = 5 V, RL = 5.1 k
600
1.3
600
1.3
NOTES
1At output switch point, VO = 1.4 V, RS = 0 with V+ from 5 V; and over the
full input common-mode range (0 V to V+ –1.5 V).
2The input common-mode voltage or either input signal voltage should not be allowed
to go negative by more than 0.3 V. The upper end of the common-mode voltage
range is V+ –1.5 V, but either or both inputs can go to +30 V without damage.
3Guaranteed by design.
4RL 15 k. VCM = 1.5 V to 13.5 V.
5Sample tested.
Specifications subject to change without notice.
–4–
Units
ns
µs
.
REV. C

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Typical Performance Characteristics
+0.3
+0.2
+0.1
0
–0.1
–0.2
–0.3
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 4. Offset Voltage vs.
Temperature
80
60
TA = –55؇C
TA = 0؇C
40
TA = +25؇C/70؇C
TA = +125؇C
20
0
0 5 10 15 20 25 30 35 40
V+ – SUPPLY VOLTAGE – VDC
Figure 5. Input Bias Current vs. V+
and Temperature
CMP04
3.0
2.0
1.0
0
–1.0
–2.0
–3.0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 6. Input Offset Current vs.
Temperature
160
150
140
130
120
110
100
90
80
70
60
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 7. Voltage Gain vs.
Temperature
1.1
TA = –55؇C
0.9 TA = 0؇C
0.7 TA = +25؇C
TA = +70؇C
0.5
TA = +125؇C
0.3
0.1
0
5 10 15 20 25 30 35 40
SUPPLY VOLTAGE – VDC
Figure 8. Supply Current vs. Supply
Voltage
10
OUT OF SATURATION
1.0
TA = +125؇C
0.1
0.01
TA = –55؇C
TA = +25؇C
0.001
0.01 0.1 1.0 10 100
IO – OUTPUT SINK CURRENT – mA
Figure 9. Output Voltage vs. Out-
put Current and Temperature
6.0
5.0
4.0
20mV
3.0
2.0
100mV
1.0
0
0
–50
–100
0
INPUT OVERDRIVE =
5.0mV
+5VDC
VIN 5.1k
VOUT
TA = +25؇C
0.5 1.0 1.5
TIME – s
2.0
Figure 10. Response Time for Various Input
Overdrives—Negative Transition
6.0
INPUT OVERDRIVE =
5.0 100mV
4.0
20mV
3.0
2.0
1.0
0
0 VIN
–50
–100
TA = +25؇C
5mV
+5VDC
5.1k
VOUT
0 0.5 1.0 1.5 2.0
TIME – s
Figure 11. Response Time for Various Input
Overdrives—Positive Transition
REV. C
–5–