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FDS8978
N-Channel PowerTrench® MOSFET
30V, 7.5A, 18m
January 2011
Features
„ rDS(on) = 18m, VGS = 10V, ID = 7.5A
„ rDS(on) = 21m, VGS = 4.5V, ID = 6.9A
„ High performance trench technology for extremely low
rDS(on)
„ Low gate charge
„ High power and current handling capability
„ 100% Rg Tested
„ RoHS Compliant
D1
D1
D2
D2
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using
either synchronous or conventional switching PWM
controllers. It has been optimized for low gate charge, low
rDS(on) and fast switching speed.
Applications
„ DC/DC converters
D2 5
D2 6
Q2
4 G2
3 S2
SO-8
Pin 1
S2 G2
G1
S1
D1
D1
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGS
ID
EAS
PD
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Continuous (TA = 25oC, VGS = 10V, RθJA = 50oC/W)
Continuous (TA = 25oC, VGS = 4.5V, RθJA = 50oC/W)
Pulsed
Single Pulse Avalanche Energy (Note 1)
Power dissipation
Derate above 25oC
TJ, TSTG Operating and Storage Temperature
7
8
Thermal Characteristics
RθJC
RθJA
RθJA
Thermal Resistance, Junction to Case (Note 2)
Thermal Resistance, Junction to Ambient (Note 2a)
Thermal Resistance, Junction to Ambient (Note 2c)
Package Marking and Ordering Information
Device Marking
FDS8978
Device
FDS8978
Package
SO-8
Reel Size
330mm
2 G1
Q1 1 S1
Ratings
30
±20
7.5
6.9
49
57
1.6
13
-55 to 150
Units
V
V
A
A
A
mJ
W
mW/oC
oC
40 oC/W
78 oC/W
135 oC/W
Tape Width
12mm
Quantity
2500 units
©2011 Fairchild Semiconductor Corporation
FDS8978 Rev. B1
1
www.fairchildsemi.com

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Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
IDSS Zero Gate Voltage Drain Current
IGSS
Gate to Source Leakage Current
ID = 250µA, VGS = 0V
VDS = 24V
VGS = 0V
TJ = 150oC
VGS = ±20V
On Characteristics
VGS(TH)
Gate to Source Threshold Voltage
rDS(on)
Drain to Source On Resistance
VGS = VDS, ID = 250µA
ID = 7.5A, VGS = 10V
ID = 6.9A, VGS = 4.5V
ID
TJ
=
=
71.550Ao,CVGS
=
10V,
Dynamic Characteristics
CISS
COSS
CRSS
RG
Qg(TOT)
Qg(5)
Qgs
Qgs2
Qgd
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Total Gate Charge at 10V
Total Gate Charge at 5V
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller” Charge
VDS = 15V, VGS = 0V,
f = 1MHz
VGS = 0.5V, f = 1MHz
VGS = 0V to 10V VDD = 15V
VGS = 0V to 5V ID = 7.5A
Switching Characteristics (VGS = 10V)
tON Turn-On Time
td(ON)
Turn-On Delay Time
tr
td(OFF)
tf
Rise Time
Turn-Off Delay Time
Fall Time
tOFF Turn-Off Time
VDD = 15V, ID = 7.5A
VGS = 10V, RGS = 16
Drain-Source Diode Characteristics
VSD Source to Drain Diode Voltage
trr Reverse Recovery Time
QRR Reverse Recovered Charge
ISD = 7.5A
ISD = 2.1A
ISD = 7.5A, dISD/dt = 100A/µs
ISD = 7.5A, dISD/dt = 100A/µs
Min
30
-
-
-
1.2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ Max Units
- -V
-
-
1
250
µA
- ±100 nA
- 2.5 V
14 18
17 21 m
22 29
907 1270
191 -
112 -
1.2 4.0
17 26
9 14
2.3 -
1.5 -
3.3 -
pF
pF
pF
nC
nC
nC
nC
nC
44 66 ns
7 10.5 ns
37 55.5 ns
48 72 ns
24 36 ns
72 108 ns
- 1.25 V
- 1.0 V
19 25 ns
10 13 nC
Notes:
1: Starting TJ = 25°C, L = 1mH, IAS = 7.5A, VDD = 30V, VGS = 10V.
2: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins.
a) 78°C/W
RθJC
when
is guaranteed
mounted on a
b0y.5diens2igpnawdhoilfe2RoθzJAcoipspdeert.ermined
by
the
user’s
board
design.
b) 125°C/W when mounted on a 0.02 in2 pad of 2 oz copper.
c) 135°C/W when mounted on a minimun pad.
©2011 Fairchild Semiconductor Corporation
FDS8978 Rev. B1
2
www.fairchildsemi.com

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Typical Characteristics TJ = 25°C unless otherwise noted
1.2
1.0
0.8
0.6
0.4
0.2
0
0 25 50 75 100 125 150
TA, AMBIENT TEMPERATURE (oC)
Figure 1. Normalized Power Dissipation vs
Ambient Temperature
8
7
6
VGS = 10V
5
4
3 VGS = 4.5V
2
1 RθJA = 78oC/W
0
25 50 75 100 125
TA, AMBIENT TEMPERATURE (oC)
150
Figure 2. Maximum Continuous Drain Current vs
Ambient Temperature
2
1 DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
0.001
10-4
1000
100
SINGLE PULSE
RθJA = 135oC/W
10-3
10-2
10-1
100
101
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
102
103
VGS = 10V
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
10
1
0.5
10-4
10-3 10-2 10-1 100
t, PULSE WIDTH (s)
101
Figure 4. Single Pulse Maximum Power Dissipation
102
103
©2011 Fairchild Semiconductor Corporation
FDS8978 Rev. B1
3
www.fairchildsemi.com

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Typical Characteristics TJ = 25°C unless otherwise noted
100
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
10
STARTING TJ = 25oC
50
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
40
VDS = 5V
30
TJ = 25oC
20
STARTING TJ = 150oC
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE (ms)
100
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 5. Unclamped Inductive Switching
Capability
10 TJ = 150oC
TJ = -55oC
0
1234
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6. Transfer Characteristics
5
50
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
40
VGS = 10V
30 VGS = 5V
20
10
VGS = 4.5V
VGS = 3.5V
VGS = 3V
0
0.0 0.2 0.4 0.6 0.8 1.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Saturation Characteristics
50
40
ID = 10.2A
30
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
20
ID = 1A
10
0
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 8. Drain to Source On Resistance vs Gate
Voltage and Drain Current
1.6
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.4
1.2
VGS = VDS, ID = 250µA
1.0
1.2
0.8
1.0
0.8
-80
VGS = 10V, ID = 10.2A
-40 0
40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
Figure 9. Normalized Drain to Source On
Resistance vs Junction Temperature
0.6
-80
-40 0
40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
Figure 10. Normalized Gate Threshold Voltage vs
Junction Temperature
©2011 Fairchild Semiconductor Corporation
FDS8978 Rev. B1
4
www.fairchildsemi.com

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Typical Characteristics TJ = 25°C unless otherwise noted
1.10
ID = 250µA
1.05
2000
1000
1.00
CRSS = CGD
CISS = CGS + CGD
COSS CDS + CGD
0.95
0.90
-80
-40 0
40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
Figure 11. Normalized Drain to Source
Breakdown Voltage vs Junction Temperature
10
VDD = 15V
8
6
4
2
0
0
WAVEFORMS IN
DESCENDING ORDER:
ID = 7.5A
ID = 1A
3 6 9 12 15 18
Qg, GATE CHARGE (nC)
Figure 13. Gate Charge Waveforms for Constant
Gate Currents
VGS = 0V, f = 1MHz
10
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 12. Capacitance vs Drain to Source
Voltage
60
100us
10
1
0.1
0.01
0.01
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 125oC/W
TA = 25oC
0.1 1 10
VDS, DRAIN to SOURCE VOLTAGE (V)
1ms
10ms
100ms
1s
10s
DC
100
Figure 14. Forward Bias Safe Operating Area
©2011 Fairchild Semiconductor Corporation
FDS8978 Rev. B1
5
www.fairchildsemi.com