CF5732GA.pdf 데이터시트 (총 6 페이지) - 파일 다운로드 CF5732GA 데이타시트 다운로드

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NIPPON PRECISION CIRCUITS INC.
CF5732 Series
Analog clock CMOS IC
OVERVIEW
The CF5732 series are analog clock driver ICs using
32kHz reference frequency of crystal oscillator. Some
versions in accordance with the combinations of each
motor drive and alarm output characteristics can provide
a wide range of applications for various clock specifica-
tions.
The CF5732 series incorporates 4 types of pace adjust-
ment capacitors, which enables to adjust the pace with
bonding options.
FEATURES
- Built-in oscillator circuits(32.678 kHz)
On-chip feed back resistors (Rf, Rd)
Crystal oscillator capacitors (CD, CG)
Additional 4 capacitors for pace adjustment.
- Debounce circuit (AI terminal)
- Single 1.5 V supply
- Available as a die
SERIES LINEUP
CF5732EA CF5732FA CF5732GA CF5732HA CF5732JA
Built-in XT terminal CG(pF)
11.5
11.5
10
11.5 11.5
Capacitor XT terminal CD(pF)
29
29
25
29
29
C1(pF)
66366
C2(pF)
77477
C4(pF)
88588
C4(pF)
99699
Motor
Active Level
-
H
L
HH
Output Hand Drive Cycle(sec) 0.125
1
1
1
1
Pulse Width(msec) DUTY50%
31.25
31.25
15.6 23.4375
Alarm
Active Level
L
L
L
L
L
Input
Test Function
Yes(1/2VDD) Yes(1/2VDD) Yes(1/2VDD) Yes(1/2VDD) Yes(1/2VDD)
Alarm
Terminal
AO AO AO AO AO AO AO AO AO AO
Output
Active Level
H L(*1) H L(*2) H L(*1) H L(*2) H L(*2)
Fundmental Frequency(Hz)
Modulation Frequency(Hz)
IOH MIN(mA)
IOL MIN(mA)
2048 2048
8+1 8+1
1.0
1.0
2048 2048
8+1 8+1
1.0
1.0
2048 2048
8+1 8+1
1.0
1.0
2048 2048
16+1 16+1
1.0
1.0
2048 2048
8+1 8+1
1.0
1.0
(*1) AO is the reverse phase of AO, when output is active. (the same phase, when output is inactive)
(*2) AO is complete reverse phase of AO. (even output is inactive.)
CF5732KA
11.5
29
6
7
8
9
H
1
46.875
L
Yes(1/2VDD)
AO AO
H L(*2)
2048 2048
8+1 8+1
1.0
1.0
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CF5732 Series
PINOUT
PIN DESCRIPTION
4 3 21
5
6
Y
14
13
12
11
(0, 0) 7 8 9
10
X
Chip size:
1.49×1.40mm
Chip thickness:
300±30µm
Pad size:
100×100µm
Reverse side of chip is VDD.
Name
VDD
VSS
TC
AI
AO
AO
OUT2
OUT1
XT
XT
C1
C2
C3
C4
Description
Power supply pin
Ground
Test pin
Alarm Input
Alarm signal Output
Alarm signal Inverting Output
Motor drive output 2
Motor drive output 1
Crystal oscillator connection
Crystal oscillator connection
Supplementary internal capacitor connection 1
Supplementary internal capacitor connection 2
Supplementary internal capacitor connection 3
Supplementary internal capacitor connection 4
No Name
1 VDD
2 VSS
3 TC
4 AI
5 AO
6 AO
7 OUT2
X
1023
817
553
214
151
151
151
Y
1248
1248
1248
1248
943
429
151
No
8
9
10
11
12
13
14
Name
OUT1
XT
XT
C1
C2
C3
C4
X
340
567
1101
1305
1305
1305
1305
(Unit: µm)
Y
151
151
151
382
682
880
1105
BLOCK DIAGRAM
VDD
VSS
CG
XT
CD
XT
TC
AI
4 Stage
Divider
13 Stage
Divider
Alarm
Input
Alarm
Test
Alarm Output
Control
Mortor Output
Control
C1 C2 C3 C4
AO AO
OUT1 OUT2
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CF5732 Series
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Input Voltage
Operating Temperature
Storage Temperature
Symbol
VDD - VSS
VIN
TOPR
TSTG
Condition
Rating
0.3 to +5.0
VSS VIN VDD
30 to +70
40 to +125
(VSS= 0V)
Unit
V
V
°C
°C
ELECTRICAL CHARACTERISTICS
Parameter
Supply Voltage
Supply Current
Motor Output Current
Alarm Output Current
Alarm Input Voltage
Alarm Input Center Voltage
Input Resistance
Oscillator Stability
Internal Capacitance
Symbol
VDD
IDD
IMOT
IOH
IOL
VIH
VIL
VIM
RIN
f/f
CG
CD
(Ta= 25°C, VDD= 1.5V, VSS= 0V, f0= 32.768kHz unless otherwise noted)
Rating
Condition
MIN TYP MAX
Unit
1.1 1.5 2.0
V
No Load(*1)
1.0 3.0
µA
VDD= 1.2V, RL= 200
4.0
mA
AO, AO pin, VOH= 0.75V 1.0
mA
AO, AO pin, VOL= 0.75V 1.0
mA
AI pin
VDD0.2
VDD
V
AI pin
VSS
VSS+0.2
V
AI pin
1/2VDD
V
AI pin
5 15 50
k
VDD= 1.1V to 2.0V
0.5 1 PPM/0.1V
(*2) GA
10
pF
others
11.5
pF
(*3) GA
25
pF
others
29
pF
(*1) All terminals except for the supply and the crystal oscillators are open.
(*2) CG is the incorporated capacitance between VDD and XT.
(*3) CD is the incorporated capacitance between VDD and XT.
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CF5732 Series
FUNCTIONAL DESCRIPTION
Alarm input/output
AI
1/2V DD (*3)
AO
fCY fPW
AO
(*1)
AO
(*2)
(*1) AO is the reverse phase of AO, when output is active. (the same phase, when output is inactive): CF5732EA, GA
(*2) AO is complete reverse phase of AO. (even output is inactive.): CF5732FA, HA, JA, KA
(*3) When AI is held at 1/2 VDD, the alarm reference, frequency is output at AO and AO.
Input Debouncing Circuit
Setting bouncing delay time prevents the circuit from the
erroneous operation by AI input bouncing (chattering.)
ton 31.25 msec : The alarm input is ignored
ton 62.5 msec : The alarm input is accepted
AI
(Active L)
tCH tON
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Motor Drive Outputs
Step needle movement
CF5732FA, GA, HA, JA, KA
CF5732 Series
OUT1
OUT2
tCY
1sec
Continuos needle movement
CF5732EA
tPW
OUT1
OUT2
tCY
125msec
tCY
125msec
tCY
1sec
tPW
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