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34AA04
4K I2CSerial EEPROM with Software Write-Protect
Device Selection Table
Part
Number
VCC Max. Clock Temp
Range Frequency Ranges
34AA04
1.7-3.6
1 MHz(1)
I, E
Note 1: 400 kHz for 1.8V VCC < 2.2V
100 kHz for VCC < 1.8V
Features
• 4 Kbit EEPROM:
- Internally organized as two 256 x 8-bit banks
- Byte or page writes (up to 16 bytes)
- Byte or sequential reads within a single bank
- Self-timed write cycle (5 ms max.)
• JEDEC® JC42.4 (EE1004-v) Serial Presence
Detect (SPD) Compliant for DRAM (DDR4)
modules
• High-Speed I2C™ Interface:
- Industry standard 1 MHz, 400 kHz, and
100 kHz
- Schmitt Trigger inputs for noise suppression
- SMBus-compatible bus time out
- Cascadable up to eight devices
• Write Protection:
- Reversible software write protection for four
individual 128-byte blocks
• Low-Power CMOS Technology:
- Voltage range: 1.7V to 3.6V
- Write current: 1.5 mA at 3.6V
- Read current: 200 µA at 3.6V, 400 kHz
- Standby current: 1 µA at 3.6V
• High Reliability:
- More than one million erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
• 8-lead PDIP, SOIC, TSSOP, TDFN, and UDFN
Packages
• Available Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Description
The Microchip Technology Inc. 34AA04 is a 4 Kbit
Electrically Erasable PROM which utilizes the I2C serial
interface and is capable of operation across a broad
voltage range (1.7V to 3.6V). This device is JEDEC
JC42.4 (EE1004-v) Serial Presence Detect (SPD)
compliant and includes reversible software write
protection for each of four independent 128 x 8-bit
blocks. The device features a page write capability of
up to 16 bytes of data. Address pins allow up to eight
devices on the same bus.
The 34AA04 is available in the 8-lead PDIP, SOIC,
TSSOP, TDFN, and UDFN packages.
Package Types
PDIP/SOIC/TSSOP
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 NC
6 SCL
5 SDA
TDFN/UDFN
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 NC
6 SCL
5 SDA
Block Diagram
A0 A1 A2
I/O
Control
Logic
Memory
Control
Logic
XDEC
SDA SCL
VCC
VSS
HV Generator
Block 0
(000h-07Fh)
Block 1
(080h-0FFh)
Block 2
(100h-17Fh)
Block 3
(180h-1FFh)
Write-Protect
Circuitry
YDEC
Sense Amp.
R/W Control
2014 Microchip Technology Inc.
DS20005271B-page 1

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34AA04
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
VCC.............................................................................................................................................................................6.5V
All Inputs and Outputs (except A0) w.r.t. VSS ............................................................................................... -0.3V to 6.5V
A0 Input w.r.t. VSS ........................................................................................................................................... -0.3 to 12V
Storage Temperature...............................................................................................................................-65°C to +150°C
Ambient Temperature with Power Applied ..............................................................................................-40°C to +125°C
ESD Protection on All Pins  4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
TABLE 1-1: DC SPECIFICATIONS
DC CHARACTERISTICS
VCC = +1.7V to +3.6V
Industrial (I): TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
No.
Symbol
D1 VIH
D2 VIL
Characteristic
A0, A1, A2, SCL, and SDA
High-Level Input Voltage
Low-Level Input Voltage
Min.
0.7 VCC
D3 VHYS Hysteresis of Schmitt
Trigger Inputs
0.0 VCC
D4 VOL
Low-Level Output Voltage
D5 VHV
High-Voltage Detect
(A0 pin only)
7
VCC + 4.8
D6 ILI
Input Leakage Current
D7 ILO
Output Leakage Current
D8 CIN, COUT Pin Capacitance
(all inputs/outputs)
D9 ICC write Operating Current
D10 ICC read
D11 ICCS
Standby Current
Max.
VCC + 0.5
0.3 VCC
0.2 VCC
0.40
0.40
10
10
±1
±1
10
1.5
200
1
5
Note: This parameter is periodically sampled and not 100% tested.
Units
Conditions
V
V VCC 2.5V
V VCC < 2.5V
V (Note)
V IOL = 20.0 mA, VCC = 2.2V
V IOL = 6.0 mA, VCC = 1.7V
V VCC < 2.2V
V VCC 2.2V
A VIN = VSS or VCC
A VOUT = VSS or VCC
pF VCC = 5.5V (Note)
TA = 25°C, FCLK = 1 MHz
mA VCC = 3.6V
A VCC = 3.6V, SCL = 400 kHz
A Industrial
A Automotive
SDA, SCL, VCC = 3.6V
A0, A1, A2 = VSS
DS20005271B-page 2
2014 Microchip Technology Inc.

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34AA04
TABLE 1-2: AC SPECIFICATIONS
AC CHARACTERISTICS
VCC = +1.7V to +3.6V
Industrial (I): TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
No.
Symbol
Characteristic
Min.
Max. Units
Conditions
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Note
FCLK
Clock Frequency (Note 2)
10 100 kHz 1.7V VCC < 1.8V
10 400
1.8V VCC 2.2V
10 1000
2.2V VCC 3.6V
THIGH
Clock High Time
4000
600
260
— ns 1.7V VCC < 1.8V
— 1.8V VCC 2.2V
— 2.2V VCC 3.6V
TLOW
Clock Low Time
4700
1300
500
— ns 1.7V VCC < 1.8V
— 1.8V VCC 2.2V
— 2.2V VCC 3.6V
TR
SDA and SCL Rise Time (Note 1)
1000
ns 1.7V VCC < 1.8V
— 300
1.8V VCC 2.2V
— 120
2.2V VCC 3.6V
TF
SDA and SCL Fall Time (Note 1)
300 ns 1.7V VCC < 1.8V
300 1.8V VCC 2.2V
120 2.2V VCC 3.6V
THD:STA Start Condition Hold Time
4000
600
260
— ns 1.7V VCC < 1.8V
— 1.8V VCC 2.2V
— 2.2V VCC 3.6V
TSU:STA Start Condition Setup Time
4700
600
260
— ns 1.7V VCC < 1.8V
— 1.8V VCC 2.2V
— 2.2V VCC 3.6V
THD:DAT Data Input Hold Time
0 — ns (Note 3)
TSU:DAT Data Input Setup Time
250 — ns 1.7V VCC < 1.8V
100 —
1.8V VCC 2.2V
50 —
2.2V VCC 3.6V
TSU:STO Stop Condition Setup Time
4000
600
260
— ns 1.7V VCC < 1.8V
— 1.8V VCC 2.2V
— 2.2V VCC 3.6V
TAA
Output Valid from Clock (Note 3)
200
3450
ns 1.7V VCC < 1.8V
200 900
1.8V VCC 2.2V
— 350
2.2V VCC 3.6V
TBUF
Bus Free Time: Time the bus must
be free before a new transmission
can start
4700
1300
500
— ns 1.7V VCC < 1.8V
— 1.8V VCC 2.2V
— 2.2V VCC 3.6V
TSP Input Filter Spike Suppression
(SDA and SCL pins)
— 50 ns (Note 1)
TWC Write Cycle Time (byte or page)
5 ms —
TTIMEOUT Bus Timeout Time
25 35 ms —
— Endurance
1M — cycles Page mode, 25°C, VCC = 3.6V
(Note 4)
1: Not 100% tested.
2: The minimum clock frequency of 10 kHz is to prevent the bus timeout from occurring.
3: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
200 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
2014 Microchip Technology Inc.
DS20005271B-page 3

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34AA04
FIGURE 1-1:
BUS TIMING DATA
SCL
SDA
In
SDA
Out
5
7
6
13
3
2
8
D3
9
11
4
10
12
DS20005271B-page 4
2014 Microchip Technology Inc.

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34AA04
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Symbol PDIP
SOIC
TSSOP UDFN
TDFN
Description
A0/VHV
A1
1
2
1
2
1 1 1 Chip Address Input, High-Voltage Input
2 2 2 Chip Address Input
A2 3
3
3
3 3 Chip Address Input
VSS
SDA
4
5
4
5
4 4 4 Ground
5 5 5 Serial Address/Data I/O
SCL 6
6
6
6 6 Serial Clock
NC
VCC
Note:
7 7 7 7 7 Not Connected
8 8 8 8 8 +1.7V to 3.6V Power Supply
Exposed pad on TDFN/UDFN can be connected to VSS or left floating.
2.1 A0, A1, A2 Chip Address Inputs
The levels on these inputs are compared with the
corresponding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 34AA04 devices may be connected to the
same bus by using different Chip Select bit combina-
tions. These inputs must be connected to either VSS or
VCC.
The A0 pin also serves as the high-voltage input for
enabling the SWPn and CWP instructions.
Note:
The comparison between the A0, A1, and
A2 pins and the corresponding Chip
Select bits is disabled for software Write-
Protect and Bank Select commands.
2.3 Serial Clock (SCL)
This input is used to synchronize the data transfer to
and from the device.
2.2 Serial Address/Data Input/Output
(SDA)
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal. Therefore, the SDA bus requires a pull-
up resistor to VCC (typical 10 kfor 100 kHz, 2 kfor
400 kHz and 1 MHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2014 Microchip Technology Inc.
DS20005271B-page 5