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[AK5576]
AK5576
6-Channel Differential 32-bit  ADC
1. General Description
The AK557x series is a 32-bit, 768 kHz sampling, differential input A/D converter for digital audio
systems. It achieves 121 dB dynamic range and 112 dB S/(N+D) while maintaining low power
consumption performance.
The AK5576 integrates a 6-channel A/D converter, suitable for mixers and multi-channel recorders. Four
types of digital filters are integrated and selectable according to the sound quality preference. The
AK5576 can be easily connected to a DSP by supporting TDM audio formats. Additionally, it supports
DSD output up to 11.2MHz. The channel summation improves the dynamic range to 124 dB in 6-to-3
mode, to 127 dB in 4-to-1 mode and to 128 dB in 6-to-1 mode.
2. Features
Sampling Rate: 8 kHz-768 kHz
Input: Full Differential Inputs
S/(N+D): 112 dB
DR: 121 dB (6-to-3 mode: 124 dB, 4-to-1 mode: 127 dB, 6-to-1 mode: 128 dB)
S/N: 121 dB (6-to-3 mode: 124 dB, 4-to-1 mode: 127 dB, 6-to-1 mode: 128 dB)
Internal Filter: Four types of LPF, Digital HPF
Power Supply: 4.75-5.25 V (Analog), 1.7-1.98 V or 3.0-3.6 V (Digital)
Output Format:
PCM mode: 24/32-bit MSB justified, I2S or TDM
DSD mode: DSD Native 64, 128, 256
Maximized Slot Efficiency in TDM Mode by Optimal Data Placed Mode
Cascade TDM I/F:
TDM512: fs= 48 kHz
TDM256: fs= 96 kHz or 48 kHz
TDM128: fs= 192 kHz, 96 kHz or 48 kHz
Operation Mode: Master Mode & Slave Mode
Detection Function: Input Overflow Flag
Serial Interface: 3-wire Serial and I2C μP I/F (Pin setting is also available)
Power Consumption: 411 mW (@AVDD= 5.0 V, TVDD= 3.3 V, fs= 48 kHz)
Package: 64-pin QFN
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[AK5576]
3. Table of Contents
1. General Description ............................................................................................................................ 1
2. Features .............................................................................................................................................. 1
3. Table of Contents................................................................................................................................ 2
4. Block Diagram..................................................................................................................................... 3
Block Diagram.................................................................................................................................... 3
5. Pin Configurations and Functions ...................................................................................................... 4
Pin Configurations ............................................................................................................................. 4
Pin Functions ..................................................................................................................................... 5
Handling of Unused Pin ..................................................................................................................... 7
6. Absolute Maximum Ratings................................................................................................................ 8
7. Recommended Operation Conditions ................................................................................................ 8
8. Analog Characteristics........................................................................................................................ 9
9. Filter Characteristics ......................................................................................................................... 10
ADC Filter Characteristics (fs= 48 kHz) .......................................................................................... 10
ADC Filter Characteristics (fs= 96 kHz) .......................................................................................... 12
ADC Filter Characteristics (fs= 192 kHz) ........................................................................................ 14
ADC Filter Characteristics (fs= 384 kHz) ........................................................................................ 16
ADC Filter Characteristics (fs= 768 kHz) ........................................................................................ 17
10. DC Characteristics ........................................................................................................................ 18
11. Switching Characteristics .............................................................................................................. 19
Timing Diagram ............................................................................................................................... 26
12. Functional Descriptions................................................................................................................. 31
Digital Core Power Supply............................................................................................................... 31
Output Mode .................................................................................................................................... 31
Master Mode and Slave Mode......................................................................................................... 31
System Clock ................................................................................................................................... 31
Audio Interface Format .................................................................................................................... 34
Channel Summation (PCM Mode, DSD Mode) .............................................................................. 46
Optimal Data Placement (PCM Mode, DSD Mode) ........................................................................ 46
CH Power Down & Channel Summation Setting (PCM Mode, DSD Mode) .................................. 47
Digital Filter Setting (PCM Mode) .................................................................................................... 52
Digital HPF (PCM Mode) ................................................................................................................. 52
Overflow Detection (PCM Mode, DSD Mode) ................................................................................. 52
LDO .................................................................................................................................................. 53
Reset................................................................................................................................................ 53
Power Up/Down Sequence ............................................................................................................. 54
Operation Mode Control .................................................................................................................. 57
Register Control Interface................................................................................................................ 57
Register Map.................................................................................................................................... 61
Register Definitions.......................................................................................................................... 61
13. Recommended External Circuits .................................................................................................. 64
14. Package......................................................................................................................................... 67
Outline Dimensions.......................................................................................................................... 67
Material & Lead Finish ..................................................................................................................... 67
Marking ............................................................................................................................................ 67
15. Ordering Guide.............................................................................................................................. 68
16. Revision History ............................................................................................................................ 68
IMPORTANT NOTICE ........................................................................................................................... 69
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Block Diagram
4. Block Diagram
[AK5576]
AIN1P
AIN1N
AIN2P
AIN2N
AIN3P
AIN3N
AIN4P
AIN4N
AIN5P
AIN5N
AIN6P
AIN6N
AVDD1
AVSS1
AVDD2
AVSS2
Voltage Reference
TVDD LDOE VDD18 DVSS
LDO
Delta-Sigma
Modulator
Delta-Sigma
Modulator
Delta-Sigma
Modulator
Delta-Sigma
Modulator
Delta-Sigma
Modulator
Delta-Sigma
Modulator
Decimation
Filter
Decimation
Filter
Decimation
Filter
Decimation
Filter
Decimation
Filter
Decimation
Filter
HPF
HPF
HPF
HPF
HPF
HPF
Serial Output
Interface
Controller
DIF0/DSDSEL0
DIF1/DSDSEL1
BICK/DCLK
LRCK/DSDOL1
TDMIN/DSDOR1
SDTO1/DSDOL2
SDTO2/DSDOR2
SDTO3/DSDOL3
DSDOR3
DP
TDM0
TDM1
ODP
PSN/CAD0_SPI
CKS0/SDA/CDTI
CKS1/CAD0_I2C/CSN
CKS2/SCL/CCLK
CKS3/CAD1
Figure 1. Block Diagram
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Pin Configurations
5. Pin Configurations and Functions
[AK5576]
DIF0/DSDSEL0
DIF1/DSDSEL1
TDM0
TDM1
PSN/CAD0_SPI
I2C
DP
DCKS/HPFE
LDOE
ODP
AIN1P
AIN1N
VREFL1
VREFH1
AIN2N
AIN2P
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
64QFN
TOP VIEW
Exposed Pad (Back Face) *
32 MSN
31 PW2
30 PW1
29 PW0
28 PDN
27 VDD18
26 DVSS
25 TVDD
24 MCLK
23 TEST
22 TESTIN6
21 TESTIN5
20 TESTIN4
19 TESTIN3
18 TESTIN2
17 TESTIN1
* The exposed pad at back face of the package must be open or connected to the ground of the board.
Figure 2. Pin Configurations
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[AK5576]
Pin Functions
No. Pin Name
1 AVSS1
2 AVDD1
3 AIN3P
4 AIN3N
5 VREFL2
6 VREFH2
7 AIN4N
8 AIN4P
9 AIN5P
10 AIN5N
11 VREFH3
12 VREFL3
13 AIN6N
14 AIN6P
15 AVDD2
16 AVSS2
17 TESTIN1
18 TESTIN2
19 TESTIN3
20 TESTIN4
21 TESTIN5
22 TESTIN6
23 TEST
24 MCLK
25 TVDD
26 DVSS
27 VDD18
28 PDN
29 PW0
30 PW1
31 PW2
32 MSN
BICK
33
DCLK
LRCK
34
DSDOL1
I/O Function
- Analog Ground Pin(AIN1-4)
- Analog Power Supply Pin(AIN1-4), 4.75-5.25 V
I Channel 3 Positive Input Pin
I Channel 3 Negative Input Pin
I ADC Low Level Voltage Reference Input Pin
I ADC High Level Voltage Reference Input Pin
I Channel 4 Negative Input Pin
I Channel 4 Positive Input Pin
I Channel 5 Positive Input Pin
I Channel 5 Negative Input Pin
I ADC High Level Voltage Reference Input Pin
I ADC Low Level Voltage Reference Input Pin
I Channel 6 Negative Input Pin
I Channel 6 Positive Input Pin
- Analog Power Supply Pin(AIN5-6), 4.75-5.25 V
- Analog Ground Pin(AIN5-6)
I Test Input Pin1
I Test Input Pin2
I Test Input Pin3
I Test Input Pin4
I Test Input Pin5
I Test Input Pin6
I TEST Enable Pin. This pin is pull down by 100kinternally
I Master Clock Input Pin
-
Digital I/O Buffers and LDO Power Supply Pin
1.7-1.98 V (LDOE pin= L) or 3.0-3.6 V (LDOE pin= H).
- Digital Ground Pin
I Digital Core Power Supply Pin, 1.7-1.98 V (LDOE pin= L)
O LDO Stabilization Capacitor Connect Pin. (LDOE pin= H)
I
Reset & Power Down Pin
L: Reset & Power down, H: Normal operation
I Power Management Pin, Channel Summation select Pin
I Power Management Pin, Channel Summation select Pin
I Power Management Pin, Channel Summation select Pin
I
Master/Slave Select Pin
L: Slave Mode, H: Master Mode
I
Audio Serial Data Clock Input Pin in PCM & Slave Mode.
This pin is pulled down by 100 kinternally
O
Audio Serial Data Clock Output Pin in PCM & Master Mode
This pin is pulled down by 100 kinternally
O
DSD Clock Output Pin in DSD Mode
This pin is pulled down by 100 kinternally
I
Channel Clock Input Pin in PCM & Slave Mode
This pin is pulled down by 100 kinternally
O
Channel Clock Output Pin in PCM & Master Mode
This pin is pulled down by 100 kinternally
O
Audio Serial Data Output Pin for AIN1 in DSD Mode
This pin is pulled down by 100 kinternally
Power Down
Status
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Hi-z & Pull Down
with 500
-
-
-
-
-
-
Hi-z
Hi-z
-
Hi-z
Hi-z
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