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CD22301
January 1997
Monolithic PCM Repeater
Features
• Automatic Line Buildout
• Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1V
• Buffered Output
Applications
• Bipolar Carrier System . . . . . . . . . . . . .T1 1.544Mbits/s
• Ternary Carrier System . . . . . . . . . . . .T148 2.37Mbits/s
Description
The CD22301 monolithic PCM repeater circuit is designed
for T1 carrier systems operating with a bipolar pulse train of
1.544Mbits/s. It can also be used in the T148 carrier system
operating with a ternary pulse train of 2.37Mbits/s. The cir-
cuit operates from a 5.1V ±5% externally regulated supply.
The CD22301 provides active circuitry to perform all func-
tions of signal equalization and amplification, automatic line
buildout (ALBO), threshold detection, clock extraction, pulse
timing and buffered output formation.
Ordering Information
PART
NUMBER
CD22301E
TEMP.
RANGE (oC)
PACKAGE
-40 to 85 18 Ld PDIP
PKG. NO.
E18.3
Pinout
CD22301 (PDIP)
TOP VIEW
ALBO GROUND 1
ALBO 1 OUTPUT 2
ALBO 2 OUTPUT 3
ALBO 3 OUTPUT 4
PREAMP INPUT + 5
PREAMP INPUT - 6
PREAMP OUTPUT + 7
PREAMP OUTPUT - 8
VEE 9
18 SUBSTRATE
17 ALBO BIAS
16 OSC BIAS
15 LC TANK INPUT
14 VCC
13 CLOCK LIMITER OUTPUT
12 TIMING PULSE INPUT
11 OUTPUT PULSE 1
10 OUTPUT PULSE 2
Functional Diagram
ALBO GND
1
ALBO OUTPUT CIRCUIT
ALBO BIAS
17
1K
VCC
AO1 2
AO2 3
AO3 4
100
100
100
100
10050K 18K
15K
FROM ALBO
PEAK DETECTOR
100
VEE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
4-231
File Number 1368.3

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CD22301
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V
Input Current (Into Pin 9 or 10). . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Peak Current (Into Pin 9 or 10). . . . . . . . . . . . . . . . . . . . . . . . 100mA
Input Surge Voltage (Between Pins 5 and 6, t = 10ms) . . . . . . . 50V
Output Surge Voltage (Between Pins 10 and 11, t = 1ms) . . . . . 50V
Power Dissipation
For TA = -40oC to 60oC . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mW
For TA = 60oC to 85oC . . . . Derate Linearly 12mW/oC to 200mW
Device Dissipation per Output Transistor
For TA = Full Package Temperature Range (All Types) . . . . . 100mW
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . -65oC TA 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . -40oC TA 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications TA = 25oC, VCC = 5.1V ±5% (See Figure 4)
PARAMETER
MIN
TYP
MAX
UNITS
STATIC DC VOLTAGES
ALBO Pins (Pins 2, 3, 4 and 17)
- 0 0.1 V
Pre Amp Inputs and Outputs (Pins 5, 6, 7 and 8)
2.4 2.9 3.4
V
Output Pulse 1, 2 (Pins 10 and 11)
- 5.1 -
V
Oscillator/Clock (Pins 12, 13, 15 and 16)
3.1 3.6 4.1
V
STATIC DC CURRENTS
ICC
Output Pulse 1, 2 (Pins 10 and 11)
- 22 30 mA
- 0 100 µA
Electrical Specifications TA = 25oC, VCC = 5.1V ±5%
PARAMETER
SYMBOL
FIGURE
DYNAMIC SPECIFICATIONS
Preamplifier Input Impedance
Preamplifier Output Impedance
Preamplifier Gain at 2.37MHz
Preamplifier Output Offset Voltage
Clock Limiter Input Impedance
ALBO Off Impedance
ALBO On Impedance
DATA Threshold Voltage
CLOCK Threshold Voltage
ALBO Threshold
VTH(D) as % of VTH(AL)
VTH(CL) as % of VTH(AL)
Buffer Gate Voltage (low)
Differential Buffer Gate Voltage
Output Pulse Rise Time
ZIN
ZOUT
AO
VOUT
ZIN(CL)
ZALBO(off)
ZALBO(on)
VTH(D)
VTH(CL)
VTH(AL)
VOL
VOL
tR
7
7
7
7
5
5
5
6
6
6
4
4
4, 8
NOTE
1
2
3
4
5, 8
6, 8
7, 8
9
9
9, 10
MIN
20
-
47
-50
10
20
-
0.62
0.92
1.4
44
66
0.65
-0.15
-
TYP
-
-
50
0
-
-
-
0.7
1.1
1.5
47
73
0.8
0
-
MAX
-
2
-
50
-
-
10
0.78
1.28
1.6
49
80
0.95
0.15
40
UNITS
k
k
dB
mV
k
k
V
V
V
%
%
V
V
ns
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CD22301
Electrical Specifications TA = 25oC, VCC = 5.1V ±5% (Continued)
PARAMETER
SYMBOL
FIGURE
NOTE
MIN
TYP MAX UNITS
Output Pulse Fall Time
tF
4, 8 9, 10
-
- 40 ns
Output Pulse Width
tW
4, 8 9, 10 290 324 340
ns
Pulse Width Differential
tW
4, 8
9, 10
-10
0
10
ns
Clock Drive Current
ICL
- 2 - mA
NOTES:
1. No signal input. Measure voltage between pins 7 and 8.
2. Measure clock limiter input impedance at pin 15. See Figure 5.
3. Adjust potentiometer for 0V (See Figure 5). Measure ALBO off impedances from pins 2, 3 and 4 to pin 1.
4. Increase potentiometer until voltage at pin 17 = 2V (See Figure 5). Measure ALBO on impedances from pins 2, 3 and 4 to pin 1.
5. Adjust potentiometer for V = 0V (See Figure 6). Then slowly increase V in the positive direction until pulses are observed at the DATA
terminal.
6. Continue increasing V until the DC level at the clock terminal drops to 4V (See Figure 6).
7. Continue increasing V until the ALBO terminal rises to 1V (See Figure 6).
8. Turn potentiometer in the opposite direction and measure negative threshold voltages by repeating tests outlined in notes 5, 6 and 7.
9. Set eIN = 2.75mVRMS at f 1.185MHz. Adjust frequency until maximum amplitude is obtained at pin 15. Observe output pulses at pins
10 and 11.
10. Adjust input signal amplitude until pulses just appear in outputs. Increase input amplitude by 3dB.
8.2K
PULSE
INPUT
430
+
ALBO
GND
1µF
SUBSTRATE ALBO
1 18 BIAS 17
0.1
µF
17µH
600 - 800pF
120K
BIAS LC TANK
16 15 INPUT
14 VCC
AO1 2
AO2 3
4
AO3
0.1µF
ALBO
OUTPUT
CIRCUIT
SEE
FIG. 1
PEAK
DETECTOR
CLOCK
CIRCUIT
SEE FIG. 2
2200pF
470µH
2.7K
1500pF
510
82pF
15µH
5
150pF
6
1.8K
130
6.19K
0.1µF
1.33K
4.53K
0.1µF
7
8
PRE-
AMPLIFIER
CLOCK THRESHOLD
COMPARATOR
DATA THRESHOLD GATE
COMPARATOR
GATE
LIMITER
TIMING
PULSE
AMPLIFIER
FF
FF
13
12
11
10
9 VEE
100
µH
PHASE
SHIFT
NETWORK
3.83K
33pF
PULSE
OUTPUT
VCC
FIGURE 1. TYPICAL 1.544MHz T1 REPEATER SYSTEM
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CD22301
16 15
VCC
5.1K
5.1K
TO AMPLIFIER
VEE
FROM CLOCK
THRESHOLD DETECTOR
FIGURE 2. CLOCK INTERFACE CIRCUIT
VCC
VCC
FROM
LIMITER
13
5.5K
VEE
12
TO TIMING
PULSE
AMPLIFIER
12K
VEE
FIGURE 3. PHASE-SHIFT INTERFACE CIRCUITS
0.1µF
eIN
8.2k
0.001
µF
0.1
8.2kµF
1
2
3
4
5
6
7
8
9
18
1µF
17 0.68µF
16
L1 (NOTE)
15
C1
(NOTE)
14
3.83k100µH
13
12 20
130pF
11
130
10
NOTE:
C1 AND L1
RESONATE AT 1.272MHz
91k
VCC = 5.1V
0.1µF
PULSE OUTPUT
FIGURE 4. DC AND OUTPUT PULSE TEST CIRCUIT
1 18
2 17 5K
0.1µF
3 16
4 15
5 14
VCC = 5.1V
0.01µF
6 13
7 12
8 11
9 10
FIGURE 5. TEST CIRCUIT FOR IMPEDANCE MEASUREMENT
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CD22301
1
2
3
4
- 3V + 8.2k
8.2k
8.2
k
0.1
µF
0.1
µF
8.2k
5k
5
6
7
0.1
µF
0.1 8
µF
9
V
18
1µF
17
1µF
16
15 CLOCK
1µF 2k
14
1µF
13
0.1µF 75
12
IN4152
VCC = 5.1V
2.75VRMS at
1.185MHz
11 130
10
DATA
FIGURE 6. TEST CIRCUIT FOR THRESHOLD VOLTAGE MEASUREMENT
1.0µF
ein
50
200
k
1.0
µF
1
2
NC
3
4
5
6
200k
7
8
9
18
17
16 NC
15
14 VCC = 5.1V
0.1µF
13
12
NC
11
10
FIGURE 7. PREAMPLIFIER GAIN AND IMPEDANCE MEASUREMENT CIRCUIT
100%
90%
tW
50%
10%
0%
tR
tF
FIGURE 8. OUTPUT PULSE WAVEFORM
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