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DC Brushless Motor Drivers for Fans
5V single-phase full wave
DC brushless fan motor driver
BD6966FVM
No.12010EAT12
Description
This is the summary of application for BD6966FVM that suit for notebook PC cooling fan motor. They employ Bi-CMOS
process and realize low ON resistor, and low power consumption and quiet drive.
Features
1) Small package (MSOP10)
2) Soft switched drive
3) PWM speed control
4) Low duty start up function and enable/disable selectable
5) Quick start function
6) Stand-by function
7) Constant voltage output for hall element
8) Lock protection and automatic restart circuit without external capacitor
9) Rotating speed pulse signal (FG) output
Application
For compact 5V fan such as notebook PC cooling fan
Absolute maximum ratings
Parameter
Symbol
Limit
Unit
Supply voltage
Power dissipation
Operation temperature
Storage temperature
Output voltage
Output current
Vcc
Pd
Topr
Tstg
Vomax
Iomax
7
585*
-40+105
-55+150
7
1000**
V
mW
V
mA
FG signal output voltage
Vfg
7
V
FG signal output current
Ifg
10 mA
Hall bias output current
Ihb
10
Junction temperature
Tjmax
150
* Reduce by 4.68mW/over Ta=25ºC(On 70mm×70mm×1.6mm glass epoxy board)
** This value is not to exceed Pd
Operating conditions
Parameter
Symbol
Operating supply voltage range Vcc
Hall input voltage range
Vh
Limit
1.85.5
0.4Vcc-1.1
mA
Unit
V
V
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1/12
2012.03 - Rev.A

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BD6966FVM
Technical Note
Electrical characteristics(Unless otherwise specified Ta=25,Vcc=5V)
Parameter
Circuit current 1
Circuit current 2
(Stand-by mode)
Hall bias voltage
Symbol
Min.
Limits
Typ.
Max.
Unit
Conditions
Icc1 1 3 6 mA PWM=OPEN
Icc2 15 25 35 uA PWM=GND
Vhb 0.9 1.0 1.1 V Ihb=-3mA
Characteristics
Fig.1
Fig.2
Fig.3
Input offset voltage
Vofs 0
- ±6 mV
-
PWM input H level
Vpwmh 2.5
- Vcc+0.3 V
-
PWM input L level
Vpwml -0.3
-
0.8 V
-
PWM input current
Ipwmh
-
0
- μA PWM=Vcc
Ipwml -33 -25 -17 μA PWM=GND
-
-
PWM input frequency
SEL input L level
Output voltage
Input-output Gain
Fpwm
2
- 50 kHz
Vsell
-0.3
-
0.8
Vo - 0.4 0.6
V
SEL=L
Start duty assist ON
V
Io=300mA
Upper and Lower total
Gio
43 44.5 46
dB
-
-
Fig.47
-
FG hysteresis voltage
Vhys
±5 ±10 ±15 mV
Fig.8
FG low voltage
FG leak current
Vfgl - 0.12 0.3 V Ifg=5mA
Ifgl 0 - 5 μA Vfg=7V
Fig.9,10
-
Lock detection ON time Ton 0.35 0.50 0.65 s
Fig.11
Lock detection OFF time Toff
3.5 5.0 6.5
s PWM=OPEN
Fig.12
Truth table
H+
H
L
H
L
H-
PWM
OUT1
OUT2
L H(OPEN) H
L
H H(OPEN) L
H
LLLL
HL L L
FG
H(Output TrOFF)
L(Output TrON)
H(Output TrOFF)
L(Output TrON)
* FG=H at stand-by mode
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BD6966FVM
Reference data
6
5
4
105
25
3
-40
2
1
Operating Voltage Range
0
1.5
2.5 3.5 4.5
Supply voltage, Vcc [V]
5.5
Fig.1 Circuit current 1
1.0
0.8
0.6 1.8V
5V 5.5V
0.4
0.2
0.0
0
0.2 0.4 0.6 0.8
Output current, Io [A]
Fig.4 Output L voltage
(Voltage characteristics)
1
1.0
0.8 105
25
0.6
-40
0.4
0.2
0.0
0
0.2 0.4 0.6 0.8
1
Output current, Io [A]
Fig.7 Output H voltage
(Temperature characteristics)
1.0
0.8
0.6
0.4
105
25
0.2
-40
0.0
0 2 4 6 8 10
FG current, Ifg [ mA]
Fig.10 FG output L voltage
(Temperature characteristics)
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© 2012 ROHM Co., Ltd. All rights reserved.
Technical Note
50
40
105
30
25
-40
20
10
0
1.5
Operating Voltage Range
2.5 3.5 4.5
Supply voltage, Vcc[V]
Fig.2 Circuit current 2
5.5
1.6
1.2
105
25
0.8 -40
0.4
0.0
0
24
68
Hall bias current, Ihb [mA]
Fig.3 Hall bias voltage
10
1.0
0.8
105
0.6
25
-40
0.4
0.2
0.0
0
0.2 0.4
0.6 0.8
Output current, Io [A]
Fig.5 Output L voltage
(Temperature characteristics)
1
15
105
10 25
-40
5
0
Operating Voltage Range
-5
-40
-10 25
105
- 15
1
2 34 5
Supply volt age, Vcc[V]
6
Fig.8 FG hysteresis voltage
1.0
0.8
-40
0.6
25
105
0.4
0.2
Operating Voltage Range
0.0
1.5
2.5 3.5 4.5
Supply voltage, Vcc [V]
5.5
Fig.11 Lock detection ON time
3/12
1.0
0.8
0.6
1.8V
5V
5.5V
0.4
0.2
0.0
0
0.2 0.4
0.6 0.8
1
Output current, Io [A]
Fig.6 Output H voltage
(Voltage characteristics)
1.0
0.8
0.6
1.8V
0.4
5V
0.2
5.5V
0.0
0 2 4 6 8 10
F G current, Ifg [mA]
Fig.9 FG output L voltage
(Voltage characteristics)
10.0
8.0
6.0
4.0
-40
25
105
2.0
Operating Voltage Range
0.0
1.5
2.5 3.5 4.5
Supply voltage, Vcc [V]
5.5
Fig.12 Lock detection OFF time
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BD6966FVM
Block diagram, application circuit, and pin assignment
M
Technical Note
OUT2
1
Setting enable or disable
of low duty start up
function
P.7
SEL
2
Incorporates soft switching
function. Adjust at an
optimum value because
gradient of switching of
output waveform depends on
hall element output.
P.5
HALL
0Ω~500Ω
H+
3
HB
4
H-
5
OSC
Lock
Protection
TSD
VREG
OSC : Internal reference oscillation circuit
TSD : Thermal shut down(heat rejection circuit)
GND
10
Control
OUT1
9
Vcc
Take a measure against Vcc
voltage rise due to reverse
connection of power supply
and back electromotive
force.
P.9
8
Vcc
200kΩ
PWM
7 Speed control by PWM
input is enabled. Input
frequency must be 50kHz
at the maximum.
P.7
FG
6 This is an open drain
output. Connect a
pull-up resistor.
P.10
PIN No.
1
2
3
4
5
6
7
8
9
10
Terminal name
OUT2
SEL
H+
HB
H-
FG
PWM
Vcc
OUT1
GND
Function
Motor output terminal 2
Low duty start up function selecting terminal
Hall input terminal+
Hall bias terminal
Hall input terminal-
FG signal output terminal
PWM signal input terminal
Power supply terminal
Motor output terminal 1
GND terminal
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BD6966FVM
Technical Note
Description of operations
1) Lock protection and automatic restart circuit
Motor rotation is detected by hall signal, and lock detection ON time (Ton) and lock detection OFF time (Toff) are set
by IC internal counter. External part (C or R) is not required. Timing chart is shown in Fig.13.
Idling
H+
OUT1
OUT2
FG
Toff Ton
Output Tr OFF ON
Depends on hall signal
(L in this figure)
Motor Lock
locking detection
Lock
Recovers normal
release operation
Fig.13 Lock protection timing chart
2) Soft switching function (silent drive setting)
Input signal to hall amplifier is amplified to produce an output signal.
When the hall element output signal is small, the gradient of switching of output waveform is gentle; When it is large,
the gradient of switching of output waveform is steep. Gain of 44.5dB (170 times) is provided between input and
output, therefore enter an appropriate hall element output to IC where output waveform swings sufficiently.
(H+)-(H-)
OUT1
Fig.14 Relation between hall element output amplitude and output waveform
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5/12
2012.03 - Rev.A