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S-25CM01A
www.sii-ic.com
© SII Semiconductor Corporation, 2010-2015
SPI SERIAL E2PROM
Rev.2.2_02_S
The S-25CM01A is a SPI serial E2PROM which operates at high speed, with low current consumption and the wide range
operation. The S-25CM01A has the capacity of 1 M-bit and the organization of 131072 words × 8-bit. Page write and
sequential read are available.
Features
Operating voltage range:
Read
Write
1.6 V to 5.5 V
1.7 V to 5.5 V
Operation frequency:
Write time:
SPI mode (0, 0) and (1, 1)
Page write:
Sequential read
Write protect:
Protect area:
10.0 MHz (VCC = 2.5 V to 5.5 V)
5.0 ms max.
256 bytes / page
Software, Hardware
25%, 50%, 100%
Monitors write to the memory by a status register
Function to prevent malfunction by monitoring clock pulse
Write protect function during the low power supply voltage
CMOS schmitt input ( CS , SCK, SI, WP , HOLD )
Endurance:
106cycles / unit*1 (Ta = +25°C)
Data retention:
100 years (Ta = +25°C)
Memory capacity:
1 M-bit
Initial delivery state:
FFh, SRWD = 0, BP1 = 0, BP0 = 0
Operation temperature range:
Ta = 40°C to +85°C
Lead-free (Sn 100%), halogen-free*2
*1. For each unit (unit: the 4 bytes with the same address of A16 to A2)
*2. Refer to "Product Name Structure" for details.
Package
8-Pin SOP (JEDEC)
Caution This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to SII
Semiconductor Corporation is indispensable.
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SPI SERIAL E2PROM
S-25CM01A
Pin Configuration
1. 8-Pin SOP (JEDEC)
8-Pin SOP (JEDEC)
Top view
18
27
36
45
Figure 1
S-25CM01A0I-J8T1U4
Rev.2.2_02_S
Pin No. Symbol
Table 1
Description
1
CS *1
Chip select input
2 SO Serial data output
3
WP *1
Write protect input
4
GND
Ground
5 SI*1 Serial data input
6
SCK*1
Serial clock input
7 HOLD *1 Hold input
8
VCC
Power supply
*1. Do not use it in high impedance.
Remark Refer to "Package drawings" for details.
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Rev.2.2_02_S
Block Diagram
Voltage Detector
CS
SCK
SI
HOLD
WP
SO
Clock Counter
Data Register
Mode
Decoder
Output
Control
Circuit
Address Register
Status Register
Read Circuit
VCC
GND
Figure 2
SPI SERIAL E2PROM
S-25CM01A
Step-up Circuit
Page Latch
Memory
Cell
Array
Status
Memory Cell Array
Y Decoder
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