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Rev. 1.3_00
REAL-TIME CLOCK
S-3530A
S-3530A is a CMOS real-time clock IC supporting an I2C-
BUS, which is designed to transfer or set each data of a clock
and calender as requested by a CPU. It provides connection
with a CPU via two wires and has two systems of an
interrupt/alarm features, allowing the alleviation of software
treatment on the side of a host.
It also works on lower power with the oscillating circuit
operated at a constant voltage.
Features
Low power consumption:
0.7 µA typ. (VDD=3.0 V)
Wide area of operating voltage: 1.7 to 5.5 V
BCD input/output of year, month, day, day of a week, hour, minute and second
CPU interface via two wires (I2C-BUS)
Auto calender till the year of 2,099
(automatic leap year arithmetic feature included)
Built-in power voltage detecting circuit
Built-in constant voltage circuit
Built-in flag generating circuit on power on/off
Built-in alarm interrupter (two systems)
Steady-state interrupt frequency/duty setting feature
Built-in 32 kHz crystal oscillating circuit (Internal Cd, External Cg)
Applications
Cellular phone
PHS
A variety of pagers
TV set and VCR
Games
Package
8-pin SSOP (pin pitch : 0.65 mm) (Package drawing code : FS008-A)
Die
Seiko Instruments Inc.
1

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REAL-TIME CLOCK
S-3530A
Block Diagram
XIN
XOUT
Oscillating
circuit
Timing
generation
VDD
VSS
Status register
Power
voltage
detecting
circuit
Constant
voltage
circuit
Rev.1.3_00
INT1 Register
Clock
generating
circuit
Comparator 1
Second Minute
Hour
Day of
week
Day
Month
Year
Comparator 2
INT2 Register
Shift register
Clock
generating
circuit
I2C-BUS
Interface
INT1
INT2
SDA
SCL
Figure 1
2 Seiko Instruments Inc.

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Rev.1.3_00
Product Code Structure
S-3530AE
xx
TB
REAL-TIME CLOCK
S-3530A
IC direction in tape specifications
Package name (abbreviation)
FS : 8-Pin SSOP
CA : Die
Description (fixed)
Seiko Instruments Inc.
3

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REAL-TIME CLOCK
S-3530A
Pin Assignment
(1) Package: S-3530AEFS
(2) Die : S-3530AECA
8-Pin SSOP
Top view
INT1
XIN
XOUT
VSS
1
2
3
4
8 VDD
7 SDA
6 SCL
5 INT2
Figure 2
Y
INT1
XIN
XOUT
S-3530A
VSS
0
VDD
SDA
SCL
X
INT2
Rev.1.3_00
Remark
Die size :
Pad size :
2.10 × 1.60 mm
Sizes shown are for design purposes only.
The corners of the die shrink by approximately 30 µm after dicing.
100 × 100 µm
Symbol
INT1
XIN
XOUT
VSS
X
890
890
890
890
Pad Coordinates
Y Symbol
641 VDD
351 SDA
114
SCL
641
INT2
Figure 3
X
890
890
890
890
Y
641
356
240
641
4 Seiko Instruments Inc.

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Rev.1.3_00
REAL-TIME CLOCK
S-3530A
Description of Pins
Pin No.
1
2
3
4
5
6
7
8
Symbol
INT1
XIN
XOUT
VSS
INT2
SCL
SDA
VDD
Table 1
Description
Configuration
Alarm interrupt 1 output pin.
Nch open drain output
Depending on the mode set by the INT1
(No protective diode on the
register and status register, it outputs low or side of VDD)
Clock when time is reached. It is disabled by
rewriting the status register.
Crystal oscillator connect pin (32,768 Hz)
(Internal Cd, External Cg)
Negative power supply pin (GND)
Alarm interrupt 2 output pin.
Nch open drain output
Depending on the mode set by the INT2
(No protective diode on the
register and status register, it outputs low or side of VDD)
Clock when time is reached. It is disabled by
rewriting the status register.
Serial clock input pin.
CMOS input (No protective
Follow the specification with great care to the diode on the side of VDD)
rising/falling time of the SCL signal because
the signal is treated at its rising/falling edge.
Serial data input/output pin.
Nch open drain output
This pin is usually pulled up to VDD via a
(No protective diode on the
resistor, and connected to other open-drain or side of VDD)
open-collector output devices in wired OR CMOS input
configuration.
Positive power supply pin.
Seiko Instruments Inc.
5