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STP12NK60Z
STF12NK60Z, STW12NK60Z
N-channel 650 V @Tjmax, 0.53 , 10 A TO-220, TO-220FP, TO-247
Zener-protected SuperMESH™ Power MOSFET
Features
Type
VDSS
RDS(on)
(@Tjmax) max
ID
PW
STP12NK60Z
STF12NK60Z
STW12NK60Z
650 V
650 V
650 V
<0.640 10 A 150 W
<0.640 10 A 35 W
<0.640 10 A 150 W
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatability
Application
Switching applications
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down,
specialties is taken to ensure a very good dv/dt
capability for the most demanding application.
Such series complements ST full range of high
voltage Power MOSFETs.
Table 1. Device summary
Order codes
Marking
STP12NK60Z
STF12NK60Z
STW12NK60Z
P12NK60Z
F12NK60Z
W12NK60Z
3
2
1
TO-220FP
3
2
1
TO-220
3
2
1
TO-247
Figure 1. Internal schematic diagram
D(2)
G(1)
Package
TO-220
TO-220FP
TO-247
S(3)
AM01476v1
Packaging
Tube
Tube
Tube
October 2009
Doc ID 11324 Rev 7
1/15
www.st.com
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Contents
Contents
STP12NK60Z, STF12NK60Z, STW12NK60Z
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/15 Doc ID 11324 Rev 7

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STP12NK60Z, STF12NK60Z, STW12NK60Z
1 Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
TO-220, TO-247 TO-220FP
Unit
VDS
VGS
ID
ID
IDM (2)
PTOT
Drain-source voltage (VGS = 0)
Gate-source voltage
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25 °C
Derating factor
VESD(G-S) Gate source ESD (HBM-C=100 pF, R=1.5 k)
dv/dt (3) Peak diode recovery voltage slope
VISO
Insulation withstand voltage (RMS) from all three
leads to external heat sink (t =1 s;TC = 25 °C)
Tstg Storage temperature
Tj Max operating junction temperature
1. Limited only by maximum temperature allowed
2. Pulse width limited by safe operating area
3. ISD 10 A, di/dt 200 A/µs, VDD = 480 V
600
±30
10
6.3
40
150
1.2
4.5
10 (1)
6.3 (1)
40 (1)
35
0.27
2500
2500
-55 to 150
150
V
V
A
A
A
W
W/°C
V
V/ns
V
°C
°C
Table 3. Thermal data
Symbol
Parameter
Rthj-case Thermal resistance junction-case max
Rthj-amb Thermal resistance junction-ambient max
Tl
Maximum lead temperature for soldering
purpose
Value
TO-220 TO-247 TO-220FP
Unit
0.83
62.5 50
3.6 °C/W
62.5 °C/W
300 °C
Table 4. Avalanche characteristics
Symbol
Parameter
Avalanche current, repetitive or not-repetitive
IAS (pulse width limited by Tj Max)
Single pulse avalanche energy
EAS (starting Tj=25°C, ID=IAS, VDD=50 V)
Doc ID 11324 Rev 7
Value
10
260
Unit
A
mJ
3/15

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Electrical characteristics
STP12NK60Z, STF12NK60Z, STW12NK60Z
2 Electrical characteristics
(TCASE = 25 °C unless otherwise specified)
Table 5. On/off
Symbol
Parameter
Drain-source
V(BR)DSS breakdown voltage
IDSS
IGSS
VGS(th)
RDS(on)
Zero gate voltage
drain current (VGS = 0)
Gate-body leakage
current (VDS = 0)
Gate threshold voltage
Static drain-source on
resistance
Test conditions
Min. Typ. Max. Unit
ID = 1 mA, VGS = 0
600
V
VDS = Max rating
VDS = Max rating, TC=125 °C
1 µA
50 µA
VGS = ± 20 V
±10 µA
VDS = VGS, ID = 100 µA
3 3.75 4.5 V
VGS = 10 V, ID = 5 A
0.53 0.64
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Ciss
Coss
Crss
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS=10 V, ID = 5 A
VDS = 25 V, f = 1 MHz,
VGS = 0
-9 -
1740
- 195 -
49
S
pF
pF
pF
Coss eq. (2)
Equivalent output
capacitance
VGS = 0, VDS = 0 to 480 V
- 101 - pF
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDD = 300 V, ID = 5 A,
RG=4.7
VGS = 10 V
(see Figure 19)
22.5
18.5
--
55
31.5
ns
ns
ns
ns
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
VDD = 480 V, ID = 10 A,
VGS = 10 V
(see Figure 20)
59 nC
- 10 - nC
32 nC
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDS
4/15 Doc ID 11324 Rev 7

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STP12NK60Z, STF12NK60Z, STW12NK60Z
Electrical characteristics
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min Typ. Max Unit
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 10 A, VGS = 0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 10 A, di/dt = 100 A/µs
VDD = 50 V
(see Figure 24)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 10 A, di/dt = 100 A/µs
VDD = 50 V, Tj = 150 °C
(see Figure 24)
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
10 A
-
40 A
- 1.6 V
358
-3
17
ns
µC
A
460
- 4.2
18.2
ns
µC
A
Table 8.
Symbol
Gate-source Zener diode
Parameter
Test conditions
Min Typ Max Unit
BVGSO (1)
Gate-Source breakdown
voltage
Igs=± 1 mA (open drain)
30 - - V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
Doc ID 11324 Rev 7
5/15