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Data Sheet
Ultralow Distortion, Wide Bandwidth
Voltage Feedback Op Amps
AD9631/AD9632
FEATURES
Wide bandwidth
AD9631, G = +1
AD9632, G = +2
Small signal
AD9631, 320 MHz
AD9632, 250 MHz
Large signal (4 V p-p)
AD9631, 175 MHz
AD9632, 180 MHz
Ultralow distortion (SFDR), low noise
−113 dBc typical @ 1 MHz
−95 dBc typical @ 5 MHz
−72 dBc typical @ 20 MHz
46 dBm third-order intercept @ 25 MHz
7.0 nV/√Hz spectral noise density
High speed
Slew rate: 1300 V/μs
Settling time to 0.01%, 2 V step: 16 ns
±3 V to ±5 V supply operation
17 mA supply current
APPLICATIONS
ADC input driver
Differential amplifiers
IF/RF amplifiers
Pulse amplifiers
Professional video
DAC current to voltage
Baseband and video communications
Pin diode receivers
Active filters/integrators/log amps
GENERAL DESCRIPTION
The AD9631/AD9632 are very high speed and wide bandwidth
amplifiers. The AD9631 is unity gain stable. The AD9632 is
stable at gains of 2 or greater. Using a voltage feedback
architecture, the exceptional settling time, bandwidth, and low
distortion of the AD9631/AD9632 meet the requirements of
many applications that previously depended on current feed-
back amplifiers. Its classical op amp structure works much more
predictably in many designs.
PIN CONFIGURATION
NC 1
–INPUT 2
AD9631/
AD9632
8 NC
7 +VS
+INPUT 3
6 OUTPUT
–VS
4
TOP VIEW
(Not to Scale)
5
NC
NOTES
1. NC = NO CONNECT.
Figure 1. 8-Lead PDIP (N) and SOIC (R) Packages
A proprietary design architecture has produced an amplifier
that combines many of the best characteristics of both current
feedback and voltage feedback amplifiers. The AD9631/AD9632
exhibit exceptionally fast and accurate pulse response (16 ns to
0.01%) as well as extremely wide small signal and large signal
bandwidth and ultralow distortion. The AD9631 achieves
−72 dBc at 20 MHz, 320 MHz small signal bandwidth, and
175 MHz large signal bandwidths.
These characteristics position the AD9631/AD9632 ideally for
driving flash as well as high resolution ADCs. Additionally, the
balanced high impedance inputs of the voltage feedback archi-
tecture allow maximum flexibility when designing active filters.
The AD9631/AD9632 are offered in the industrial (−40°C to
+85°C) temperature range. They are available in PDIP and SOIC.
–30
VS = ±5V
–40
RL = 500
VOUT = 2V p-p
–50
–60
–70
–80
–90
–100
SECOND HARMONIC
–110
–120
THIRD HARMONIC
–130
10k
100k
1M
FREQUENCY (Hz)
10M
100M
Figure 2. AD9631 Harmonic Distortion vs. Frequency, G = +1
Rev. D
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Technical Support
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AD9631/AD9632
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings............................................................ 5
Metallization Photo...................................................................... 5
Thermal Resistance ...................................................................... 5
Maximum Power Dissipation ..................................................... 5
ESD Caution.................................................................................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 15
REVISION HISTORY
2/14—Rev. C to Rev. D
Changes to Figure 33...................................................................... 10
Changes to Analog-to-Digital Converter (ADC) Driver Section
and Figure 66................................................................................... 18
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
7/03—Rev. B to Rev. C
Deleted Evaluation Boards information..........................Universal
Deleted military CERDIP version ....................................Universal
Change to Absolute Maximum Ratings......................................... 3
Change to TPC 4............................................................................... 4
Change to TPC 10............................................................................. 5
Change to Figure 6 ......................................................................... 14
Updated Outline Dimensions ....................................................... 17
1/03—Rev. A to Rev. B
Deleted DIP (N) Inverter, SOIC (R) Inverter, and DIP (N)
Noninverter Evaluation Boards in Figures 12–14...................... 17
Updated Outline Dimensions ....................................................... 18
Data Sheet
General......................................................................................... 15
Feedback Resistor Choice.......................................................... 15
Pulse Response ........................................................................... 16
Large Signal Performance ......................................................... 16
Power Supply Bypassing ............................................................ 16
Driving Capacitive Loads.......................................................... 16
Applications Information .............................................................. 17
Operation as a Video Line Driver ............................................ 17
Active Filters ............................................................................... 17
Analog-to-Digital Converter (ADC) Driver .......................... 18
Layout Considerations............................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
Rev. D | Page 2 of 20

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Data Sheet
AD9631/AD9632
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
±VS = ±5 V; RLOAD = 100 Ω; AV = 1 (AD9631); AV = 2 (AD9632), unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
Bandwidth (–3 dB)
Small Signal
Large Signal1
Bandwidth for 0.1 dB Flatness
Slew Rate, Average ±
Rise/Fall Time
Settling Time
To 0.1%
To 0.01%
HARMONIC/NOISE PERFORMANCE
Second Harmonic Distortion
Third Harmonic Distortion
Third-Order Intercept
Noise Figure
Input Voltage Noise
Input Current Noise
Average Equivalent Integrated
Input Noise Voltage
Differential Gain Error (3.58 MHz)
Differential Phase Error (3.58 MHz)
Phase Nonlinearity
DC PERFORMANCE2
Input Offset Voltage3
Offset Voltage Drift
Input Bias Current
Input Offset Current
Common-Mode Rejection Ratio
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Test Conditions/Comments
VOUT ≤ 0.4 V p-p
VOUT = 4 V p-p
VOUT = 300 mV p-p
RF = 140 Ω (AD9631);
RF = 425 Ω (AD9632)
VOUT = 4 V step
VOUT = 0.5 V step
VOUT = 4 V step
VOUT = 2 V step
VOUT = 2 V step
2 V p-p; 20 MHz, RL = 100 Ω
RL = 500 Ω
2 V p-p; 20 MHz, RL = 100 Ω
RL = 500 Ω
25 MHz
RS = 50 Ω
1 MHz to 200 MHz
1 MHz to 200 MHz
0.1 MHz to 200 MHz
RL = 150 Ω
RL = 150 Ω
DC to 100 MHz
RL = 150 Ω
TMIN − TMAX
TMIN − TMAX
TMIN − TMAX
VCM = ± 2.5 V
VOUT = ± 2.5 V
TMIN − TMAX
AD9631
Min Typ Max
220 320
150 175
130
1000
1300
1.2
2.5
11
16
−64 −57
−72 −65
−76 −69
−81 −74
46
18
7.0
2.5
100
0.03 0.06
0.02 0.04
1.1
3 10
13
±10
27
10
0.1 3
5
70 90
46 52
40
500
1.2
±3.4
AD9632
Min Typ Max
180 250
155 180
130
1200
1500
1.4
2.1
11
16
−54 −47
−72 −65
−74 −67
−81 −74
41
14
4.3
2.0
60
0.02 0.04
0.02 0.04
1.1
25
8
±10
27
10
0.1 3
5
70 90
46 52
40
500
1.2
±3.4
Unit
MHz
MHz
MHz
V/μs
ns
ns
ns
ns
dBc
dBc
dBc
dBc
dBm
dB
nA/√Hz
pA/√Hz
μV rms
%
Degree
Degree
mV
mV
µV/°C
µA
µA
µA
µA
dB
dB
dB
pF
V
Rev. D | Page 3 of 20

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AD9631/AD9632
Data Sheet
Parameter
OUTPUT CHARACTERISTICS
Output Voltage Range
Output Current
Output Resistance
Short Circuit Current
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
Test Conditions/Comments
RL = 150 Ω
TMIN − TMAX
TMIN − TMAX
1 See the Absolute Maximum Ratings and Theory of Operation sections of this data sheet.
2 Measured at AV = 50.
3 Measured with respect to the inverting input.
AD9631
AD9632
Min Typ Max Min Typ Max Unit
±3.2 ±3.9
70
0.3
240
±3.2 ±3.9
70
0.3
240
V
mA
Ω
mA
±3.0 ±5.0 ±6.0 ±3.0 ±5.0 ±6.0 V
17 18
16 17 mA
21 20 mA
50 60
56 66
dB
Rev. D | Page 4 of 20

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Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage (+VS to −VS)
Voltage Swing × Bandwidth Product
Internal Power Dissipation
PDIP (N)
SOIC (R)
Input Voltage (Common Mode)
Differential Input Voltage
Output Short Circuit Duration
Storage Temperature Range
Operating Temperature Range (A Grade)
Lead Temperature Range (Soldering 10 sec)
Rating
12.6 V
550 V × MHz
1.3 W
0.9 W
±VS
±1.2 V
Observe Power
Derating Curves
−65°C to +125°C
−40°C to +85°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
METALLIZATION PHOTO
–IN +VS
27
0.046
(1.17)
6
OUT
34
AD9631
+IN –VS
0.050 (1.27)
–IN +VS
27
AD9631/AD9632
THERMAL RESISTANCE
Table 3.
Package Type1
8-Lead PDIP (N)
8-Lead SOIC (R)
θJA Unit
90 °C/W
140 °C/W
1 For device in free air.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by these
devices is limited by the associated rise in junction temperature.
The maximum safe junction temperature for plastic encapsu-
lated devices is determined by the glass transition temperature
of the plastic, approximately 150°C. Exceeding this limit tempo-
rarily may cause a shift in parametric performance due to a
change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.
While the AD9631 and AD9632 are internally short circuit
protected, this may not be sufficient to guarantee that the max-
imum junction temperature (150°C) is not exceeded under all
conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves.
2.0
TJ = 150°C
8-LEAD PDIP PACKAGE
1.5
1.0
8-LEAD SOIC PACKAGE
0.5
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE (°C)
Figure 4. Maximum Power Dissipation vs. Temperature
ESD CAUTION
0.046
(1.17)
6
OUT
34
+IN –VS
AD9632
Figure 3. Dimensions shown in inches and (millimeters) Connect Substrate to −VS
Rev. D | Page 5 of 20