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Data Sheet
FEATURES
8 channels of LNA, VGA, antialiasing filter, ADC, and digital
demodulator/decimator
Low power
150 mW per channel, time gain compensation (TGC) mode,
40 MSPS
62.5 mW per channel, continuous wave (CW) mode;
<30 mW in power-down mode
10 mm × 10 mm, 144-ball CSP_BGA
TGC channel, input referred noise voltage: 0.82 nV/√Hz,
maximum gain
Flexible power-down modes
Fast recovery from low power standby mode: <2 μs
Low noise preamplifier (LNA)
Input noise voltage: 0.78 nV/√Hz, gain = 21.6 dB
Programmable gain: 15.6 dB/17.9 dB/21.6 dB
0.1 dB input compression point: 1.00 V p-p/0.75 V p-p/
0.45 V p-p
Flexible active input impedance matching
Variable gain amplifier (VGA)
Attenuator range: 45 dB, linear-in-dB gain control
Postamplifier gain (PGA): 21 dB/24 dB/27 dB/30 dB
Antialiasing filter
Programmable, second-order low-pass filter from 8 MHz to
18 MHz or 13.5 MHz to 30 MHz and high-pass filter
Analog-to-digital converter (ADC)
Signal-to-noise ratio (SNR): 75 dB, 14 bits up to 125 MSPS
Configurable serial low voltage differential signaling (LVDS)
CW mode harmonic rejection I/Q demodulator
Individual programmable phase rotation
Dynamic range per channel: >160 dBFS/√Hz
Close in SNR: 156 dBc/√Hz, 1 kHz offset, −3 dBFS
Digital demodulator/decimator
I/Q demodulator with programmable oscillator FIR
decimation filter
APPLICATIONS
Medical imaging/ultrasound
Nondestructive testing (NDT)
Octal Ultrasound AFE
with Digital Demodulator
AD9670
GENERAL DESCRIPTION
The AD9670 is designed for low cost, low power, small size, and
ease of use for medical ultrasound applications. It contains eight
channels of a VGA with an LNA, a CW harmonic rejection I/Q
demodulator with programmable phase rotation, an antialiasing
filter, an ADC, and a digital demodulator and decimator for data
processing and bandwidth reduction.
Each channel features a maximum gain of up to 52 dB, a fully
differential signal path, and an active input preamplifier termination.
The channel is optimized for high dynamic performance and
low power in applications where a small package size is critical.
The LNA has a single-ended-to-differential gain that is selectable
through the serial port interface (SPI). Assuming a 15 MHz noise
bandwidth (NBW) and a 21.6 dB LNA gain, the LNA input SNR
is 94 dB. In CW Doppler mode, each LNA output drives an I/Q
demodulator that has independently programmable phase
rotation with 16 phase settings.
Power-down of individual channels is supported to increase
battery life for portable applications. Standby mode allows quick
power-up for power cycling. In CW Doppler operation, the
VGA, antialiasing filter, and ADC are powered down. The ADC
contains several features designed to maximize flexibility and
minimize system cost, such as a programmable clock, data
alignment, and programmable digital test pattern generation.
The digital test patterns include built-in fixed patterns, built-in
pseudorandom patterns, and custom user-defined test patterns
entered via the SPI.
Rev. A
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rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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AD9670* Product Page Quick Links
Last Content Update: 11/01/2016
Comparable Parts
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Evaluation Kits
• AD9670 Evaluation Board
Documentation
Data Sheet
• AD9670: Octal Ultrasound AFE with Digital Demodulator
Data Sheet
Reference Materials
Press
• Industry’s First Octal Ultrasound Receiver with Digital I/Q
Demodulator and Decimation Filter Reduces Processor
Overhead in Ultrasound Systems
• Industry’s First Octal Ultrasound Receiver with JESD204B
Serial Interface Reduces Data I/O Routing and Simplifies
Ultrasound System Design
• Low Cost, Octal Ultrasound Receiver with On-Chip RF
Decimator and JESD204B Serial Interface
Design Resources
• AD9670 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
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AD9670
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
General Description ......................................................................... 1 
Revision History ............................................................................... 2 
Functional Block Diagram .............................................................. 3 
Specifications..................................................................................... 4 
AC Specifications.......................................................................... 4 
Digital Specifications ................................................................... 7 
Switching Specifications .............................................................. 8 
Timing Diagrams.......................................................................... 9 
Absolute Maximum Ratings.......................................................... 11 
Thermal Impedance ................................................................... 11 
ESD Caution................................................................................ 11 
Pin Configuration and Function Descriptions........................... 12 
Typical Performance Characteristics ........................................... 15 
TGC Mode Characteristics ....................................................... 15 
CW Doppler Mode Characteristics ......................................... 19 
Theory of Operation ...................................................................... 20 
TGC Operation........................................................................... 20 
Analog Test Signal Generation ................................................. 33 
REVISION HISTORY
2/16—Revision A: Initial Version
Data Sheet
CW Doppler Operation............................................................. 33 
Digital Demodulator/Decimator.................................................. 35 
Vector Profile .............................................................................. 35 
RF Decimator.............................................................................. 36 
Baseband Demodulator and Decimator.................................. 37 
Digital Test Waveforms.............................................................. 38 
Digital Block Power Saving Scheme ........................................ 38 
Serial Port Interface (SPI).............................................................. 39 
Hardware Interface..................................................................... 39 
Memory Map .................................................................................. 41 
Reading the Memory Map Table.............................................. 41 
Reserved Locations .................................................................... 41 
Default Values ............................................................................. 41 
Logic Levels................................................................................. 41 
Recommended Startup Sequence ............................................ 41 
Memory Map Register Descriptions........................................ 51 
Outline Dimensions ....................................................................... 52 
Ordering Guide .......................................................................... 52 
Rev. A | Page 2 of 52

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Data Sheet
AD9670
FUNCTIONAL BLOCK DIAGRAM
AVDD1 AVDD2 PDWN STBY
DVDD
LO-A TO LO-H
LOSW-A TO LOSW-H
LI-A TO LI-H
LG-A TO LG-H
LNA
CWD AND I/Q
DEMODULATOR
VGA
AAF
14-BIT
ADC
DEMODULATOR/
DECIMATOR
DRVDD
SERIALIZER LVDS
CWQ+
CWQ–
CWI+
CWI–
DOUTA+ TO DOUTH+
DOUTA– TO DOUTH–
LO
GENERATION
REFERENCE
8 CHANNELS
NCO
SERIAL
PORT
INTERFACE
AD9670
DATA
RATE
MULTIPLIER
FCO+
FCO–
DCO+
DCO–
Figure 1.
Rev. A | Page 3 of 52

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AD9670
Data Sheet
SPECIFICATIONS
AC SPECIFICATIONS
AVDD1 = 1.8 V, AVDD2 = 3.0 V, DVDD = 1.4 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, full temperature range (0°C to 85°C), fIN =
5 MHz, local oscillator (LO) band mode, RS = 50 Ω, RFB = ∞ (unterminated), LNA gain = 21.6 dB, LNA bias = midhigh, PGA gain = 27 dB,
analog gain control, VGAIN = (GAIN+) − (GAIN−) = 1.6 V, antialiasing filter, low-pass filter (LPF) cutoff = fSAMPLE/3 in Mode I/Mode II,
antialiasing filter LPF cutoff = fSAMPLE /4.5 in Mode III/Mode IV, high-pass filter (HPF) cutoff = LPF cutoff/12.00, Mode I = fSAMPLE = 40 MSPS,
Mode II = fSAMPLE = 65 MSPS, Mode III = fSAMPLE = 80 MSPS, Mode IV = 125 MSPS, radio frequency (RF) decimator bypassed, digital demod-
ulator and baseband decimator bypassed, digital high-pass filter bypassed, low power LVDS mode, unless otherwise noted. All gain setting
options are listed, which can be configured via SPI registers, and all power supply currents and power dissipations are listed for the four mode
settings (Mode I, Mode II, Mode III, and Mode IV), respectively, via slashes in Table 1.
Table 1.
Parameter1
LNA CHARACTERISTICS
Gain
0.1 dB Input Compression Point
1 dB Input Compression Point
Input Common Mode (LI-x, LG-x)
Output Common Mode
LO-x
LOSW-x
Input Resistance (LI-x)
Test Conditions/Comments
Single-ended input to differential output
Single-ended input to single-ended output
LNA gain = 15.6 dB
LNA gain = 17.9 dB
LNA gain = 21.6 dB
LNA gain = 15.6 dB
LNA gain = 17.9 dB
LNA gain = 21.6 dB
Switch off
Switch on
Switch off
Switch on
RFB = 300 Ω
RFB = 1350 Ω
Input Capacitance (LI-x)
Input Noise Voltage
Input Noise Current
FULL CHANNEL (TGC) CHARACTERISTICS
Antialiasing Filter Low-Pass Cutoff
In Range Antialiasing Filter
Bandwidth Tolerance
Group Delay Variation
Input Referred Noise Voltage
Noise Figure
Active Termination Matched
Unterminated
Correlated Noise Ratio
Output Offset
RS = 0 Ω
LNA gain = 15.6 dB
LNA gain = 17.9 dB
LNA gain = 21.6 dB
−3 dB, programmable, low band mode
−3 dB, programmable, high band mode
f = 1 MHz to 18 MHz, VGAIN = −1.6 V to +1.6 V
LNA gain = 15.6 dB
LNA gain = 17.9 dB
LNA gain = 21.6 dB
RS = 50 Ω
LNA gain = 15.6 dB, RFB = 150 Ω
LNA gain = 17.9 dB, RFB = 200 Ω
LNA gain = 21.6 dB, RFB = 300 Ω
LNA gain = 15.6 dB
LNA gain = 17.9 dB
LNA gain = 21.6 dB
No signal, correlated/uncorrelated
Min Typ
Max
15.6/17.9/21.6
9.6/11.9/15.6
1.00
0.75
0.45
1.20
0.90
0.60
2.2
High-Z
1.5
High-Z
1.5
50
200
6
20
0.83
0.82
0.78
2.6
8
13.5
±10
±350
0.96
0.90
0.82
18
30
−100
5.6
4.8
3.8
3.2
2.9
2.6
−30
+100
Unit
dB
dB
V p-p
V p-p
V p-p
V p-p
V p-p
V p-p
V
Ω
V
Ω
V
Ω
Ω
pF
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
MHz
MHz
%
ps
nV/√Hz
nV/√Hz
nV/√Hz
dB
dB
dB
dB
dB
dB
dB
LSB
Rev. A | Page 4 of 52