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Data Sheet
Integrated, Dual RF Transceiver
with Observation Path
AD9371
FEATURES
Dual differential transmitters (Tx)
Dual differential receivers (Rx)
Observation receiver (ORx) with 2 inputs
Sniffer receiver (SnRx) with 3 inputs
Tunable range: 300 MHz to 6000 MHz
Tx synthesis bandwidth (BW) to 250 MHz
Rx BW: 8 MHz to 100 MHz
Supports frequency division duplex (FDD) and time division
duplex (TDD) operation
Fully integrated independent fractional-N radio frequency (RF)
synthesizers for Tx, Rx, ORx, and clock generation
JESD204B digital interface
APPLICATIONS
3G/4G micro and macro base stations (BTS)
3G/4G multicarrier picocells
FDD and TDD active antenna systems
Microwave, nonline of sight (NLOS) backhaul systems
GENERAL DESCRIPTION
The AD9371 is a highly integrated, wideband RF transceiver
offering dual channel transmitters and receivers, integrated
synthesizers, and digital signal processing functions. The IC
delivers a versatile combination of high performance and low
power consumption required by 3G/4G micro and macro BTS
equipment in both FDD and TDD applications. The AD9371
operates from 300 MHz to 6000 MHz, covering most of the
licensed and unlicensed cellular bands. The IC supports receiver
bandwidths up to 100 MHz. It also supports observation receiver
and transmit synthesis bandwidths up to 250 MHz to
accommodate digital correction algorithms.
The transceiver consists of wideband direct conversion signal
paths with state-of-the-art noise figure and linearity. Each complete
receiver and transmitter subsystem includes dc offset correction,
quadrature error correction (QEC), and programmable digital
filters, eliminating the need for these functions in the digital
baseband. Several auxiliary functions such as an auxiliary analog-
to-digital converter (ADC), auxiliary digital-to-analog converters
(DACs), and general-purpose input/outputs (GPIOs) are integrated
to provide additional monitoring and control capability.
An observation receiver channel with two inputs is included to
monitor each transmitter output and implement interference
mitigation and calibration applications. This channel also connects
to three sniffer receiver inputs that can monitor radio activity in
different bands.
RX1+
RX1–
RX2+
RX2–
RX_EXTLO+
RX_EXTLO–
TX1+
TX1–
TX2+
TX2–
FUNCTIONAL BLOCK DIAGRAM
AD9371
RX1
RX2
LPF
ADC
LPF
ADC
EXTERNAL
OPTION
LO
GENERATOR
RF
SYNTHESIZER
DECIMATION,
pFIR,
DC OFFSET
QEC,
TUNING,
RSSI,
OVERLOAD
MICRO-
CONTROLLER
TX1
TX2
LPF
DAC
LPF
DAC
SPI
PORT
pFIR,
QEC,
INTERPOLATION
TX_EXTLO+
TX_EXTLO–
EXTERNAL
OPTION
LO
GENERATOR
LO
GENERATOR
RF
SYNTHESIZER
RF
SYNTHESIZER
ORX1+
ORX1–
ORX2+
ORX2–
OBSERVATION
Rx
GPIO
AUXADC
AUXDAC
CLOCK
GENERATOR
SNRXA+
SNRXA–
SNRXB+
SNRXB–
SNRXC+
SNRXC–
SNIFFER
Rx
LPF DECIMATION,
pFIR,
ADC
AGC,
DC OFFSET,
LPF QEC,
ADC
TUNING,
RSSI,
OVERLOAD
NOTES
1. FOR JESD204B PINS, SEE FIGURE 4.
Figure 1.
The high speed JESD204B interface supports lane rates up to
6144 Mbps. Four lanes are dedicated to the transmitters and four
lanes are dedicated to the receiver and observation receiver channels.
The fully integrated phase-locked loops (PLLs) provide high
performance, low power fractional-N frequency synthesis for
the transmitter, the receiver, the observation receiver, and the
clock sections. Careful design and layout techniques provide the
isolation demanded in high performance base station applications.
All voltage controlled oscillator (VCO) and loop filter components
are integrated to minimize the external component count.
A 1.3 V supply is required to power the core of the AD9371, and
a standard 4-wire serial port controls it. Other voltage supplies
provide proper digital interface levels and optimize transmitter
and auxiliary converter performance. The AD9371 is packaged in a
12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA).
Rev. B
Document Feedback
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responsibilityis assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2016–2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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AD9371
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
General Description ......................................................................... 1 
Functional Block Diagram .............................................................. 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
Current and Power Consumption Specifications..................... 9 
Timing Specifications ................................................................ 10 
Absolute Maximum Ratings.......................................................... 12 
Reflow Profile.............................................................................. 12 
Thermal Resistance .................................................................... 12 
ESD Caution................................................................................ 12 
Pin Configuration and Function Descriptions........................... 13 
Typical Performance Characteristics ........................................... 16 
700 MHz Band ............................................................................ 16 
2.6 GHz Band.............................................................................. 26 
3.5 GHz Band.............................................................................. 36 
REVISION HISTORY
3/2017—Rev. A to Rev. B
Change to Table 1............................................................................. 6
Deleted Figure 230 through Figure 239; Renumbered
Sequentially ..................................................................................... 55
Changes to Sniffer Receiver (SnRx) Section ............................... 55
11/2016—Rev. 0 to Rev. A
Changes to Table 1............................................................................ 6
Changes to Table 2............................................................................ 9
Changes to L3, L4 Description Column, Table 6; M3, M4
Description Column, Table 6; and M13, M14 Description
Column, Table 6.............................................................................. 16
Changes to Figure 46 Caption....................................................... 23
Changes to Figure 48 Caption....................................................... 24
Changes to Figure 56 Caption and Figure 57 Caption .............. 25
Changes to Figure 82 Caption....................................................... 30
Data Sheet
5.5 GHz Band.............................................................................. 46 
Theory of Operation ...................................................................... 54 
Transmitter (Tx) ......................................................................... 54 
Receiver (Rx)............................................................................... 54 
Observation Receiver (ORx)..................................................... 54 
Sniffer Receiver (SnRx) ............................................................. 54 
Clock Input.................................................................................. 54 
Synthesizers................................................................................. 55 
Serial Peripheral Interface (SPI) Interface .............................. 55 
GPIO_x AND GPIO_3P3_x Pins ............................................ 55 
Auxiliary Converters.................................................................. 55 
JESD204B Data Interface .......................................................... 55 
Power Supply Sequence ............................................................. 56 
JTAG Boundary Scan................................................................. 56 
Outline Dimensions ....................................................................... 57 
Ordering Guide .......................................................................... 57 
Changes to Figure 105 Caption .................................................... 33
Changes to Figure 107 Caption .................................................... 34
Changes to Figure 115 Caption and Figure 116 Caption.......... 35
Changes to Figure 141 Caption .................................................... 40
Changes to Figure 164 Caption .................................................... 43
Changes to Figure 166 Caption .................................................... 44
Changes to Figure 174 Caption and Figure 175 ......................... 45
Changes to Figure 194 and Figure 199 Caption ......................... 49
Changes to Figure 222 Caption .................................................... 53
Changes to Figure 224 Caption .................................................... 54
Added Figure 230 to Figure 235; Renumbered Sequentially .... 55
Added Figure 236 to Figure 239 ................................................... 56
Added External LO Inputs Section .............................................. 58
7/2016—Revision 0: Initial Version
Rev. B | Page 2 of 57

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Data Sheet
AD9371
SPECIFICATIONS
Electrical characteristics at ambient temperature range, VDDA_SER = 1.3 V, VDDA_DES = 1.3 V, JESD_VTT_DES = 1.3 V, VDDA_1P31 =
1.3 V, VDIG = 1.3 V, VDDA_1P8 = 1.8 V, VDD_IF = 2.5 V, and VDDA_3P3 = 3.3 V; all RF specifications based on measurements that
include printed circuit board (PCB) and matching circuit losses, unless otherwise noted.
Table 1.
Parameter
TRANSMITTERS (Tx)
Center Frequency
Tx Large Signal Bandwidth (BW)
Tx Synthesis BW2
Symbol Min
300
BW Flatness
Deviation from Linear Phase
Power Control Range
0
Power Control Resolution
ACLR5 (Four Universal Mobile
Telecommunications System
(UMTS) Carriers)
700 MHz Local Oscillator (LO)
2600 MHz LO
3500 MHz LO
5500 MHz LO
In-Band Noise
Tx to Tx Isolation
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Image Rejection
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Maximum Output Power
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Output Third-Order Intercept Point
OIP3
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Typ
±0.5
±0.15
10
0.05
−64
−64
−63
−61
−155
70
65
65
65
65
65
65
50
7
7
6
4
27
27
25
25
Max
6000
100
250
42
Unit Test Conditions/Comments
MHz
MHz
MHz
dB
dB
Degrees
dB
dB
Wider bandwidth for use in
digital processing algorithms
250 MHz BW, compensated
by programmable finite
infinite response (FIR) filter
Any 20 MHz BW span,
compensated by
programmable FIR filter
250 MHz BW
Increased calibration time,
reduced QEC3, LOL4
performance beyond 20 dB
−11.2 dBFS rms, 0 dB RF
attenuation
dB
dB
dB
dB
dBFS6/Hz
dB
dB
dB
dB
Up to 20 dB RF attenuation,
within large signal BW,
QEC3 active
dB
dB
dB
dB
0 dBFS, 1 MHz signal input,
50 Ω load, 0 dB RF attenuation
dBm
dBm
dBm
dBm
−5 dBFS rms, 0 dB RF
attenuation
dBm
dBm
dBm
dBm
Rev. B | Page 3 of 57

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AD9371
Parameter
Carrier Leakage
Symbol Min
Typ
Max
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Error Vector Magnitude (3GPP
Test Signals)
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Output Impedance
RECEIVERS (Rx)
Center Frequency
Gain Range
Analog Gain Step
BW Ripple
EVM
300
0
Rx Bandwidth
8
−81
−81
−81
−75
−45
−39
−38.5
−37.5
50
0.5
±0.5
±0.2
6000
30
100
Rx Alias Band Rejection
Maximum Recommended Input
Power8
75
−14
Noise Figure
NF
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Input Third-Order Intercept Point
IIP3
12
13.5
14
18
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Input Second-Order Intercept
Point
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
IIP2
22
22
20
20
65
65
65
57
Rev. B | Page 4 of 57
Unit
dBFS6
dBFS6
dBFS6
dBFS6
dB
dB
dB
dB
Ω
MHz
dB
dB
dB
dB
MHz
dB
dBm
dB
dB
dB
dB
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
Data Sheet
Test Conditions/Comments
After calibration, LOL
correction active, CW7 input
signal, 3 dB RF and 3 dB digital
attenuation, 40 kHz
measurement BW
Long-term evolution (LTE)
20 MHz downlink,
5 dB RF attenuation
Differential
100 MHz BW, compensated
by programmable FIR filter
Any 20 MHz span,
compensated by
programmable FIR filter
Analog low-pass filter (LPF)
BW is 20 MHz minimum,
programmable FIR BW
configurable over the entire
range
Due to digital filters
Input is a CW7 signal at a 0 dB
attenuation setting; this level
increases decibel for decibel
with attenuation
Maximum Rx gain, at
Rx port, matching losses
de-embedded
Maximum Rx gain, third-
order intermodulation (IM3)
1 MHz offset from LO
Maximum Rx gain, second-
order intermodulation (IM2)
1 MHz offset from LO

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Data Sheet
Parameter
Image Rejection
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Input Impedance
Tx1 to Rx1 Signal Isolation and
Tx2 to Rx2 Signal Isolation
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Tx1 to Rx2 Signal Isolation and
Tx2 to Rx1 Signal Isolation
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Rx1 to Rx2 Signal Isolation
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
Rx Band Spurs Referenced to
RF Input at Maximum Gain
Symbol Min
Rx LO Leakage at Rx Input at
Maximum Gain
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
OBSERVATION RECEIVER (ORx)
Center Frequency
Gain Range
Analog Gain Step
BW Ripple
Deviation from Linear Phase
ORx Bandwidth
ORx Alias Band Rejection
Maximum Recommended Input
Power8
300
0
60
Signal-to-Noise Ratio9
700 MHz LO
2600 MHz LO
3500 MHz LO
5500 MHz LO
SNR
Typ
75
75
75
75
200
68
68
62
60
70
70
62
60
60
60
60
60
−95
−65
−65
−62
−62
1
±0.5
10
−13
60
60
60
59
Max
6000
18
250
AD9371
Unit Test Conditions/Comments
QEC3 active, within Rx BW
dB
dB
dB
dB
Ω Differential
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm No more than one spur at
this level per 10 MHz of Rx
BW; excludes harmonics of
the reference clock
Leakage decreases decibel
for decibel with attenuation
for first 12 dB
dBm
dBm
dBm
dBm
MHz
dB
dB
dB
Degrees
MHz
dB
dBm
dB
dB
dB
dB
250 MHz RF BW, compensated
by programmable FIR filter
250 MHz RF BW
Due to digital filters
Input is a CW7 signal at 0 dB
attenuation setting; this level
increases decibel for decibel
with attenuation
Maximum gain at ORx port
200 MHz BW, 245.76 MSPS
Rev. B | Page 5 of 57