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Data Sheet
8-/6-/4-Channel DAS with 16-Bit, Bipolar
Input, Simultaneous Sampling ADC
AD7606/AD7606-6/AD7606-4
FEATURES
8/6/4 simultaneously sampled inputs
True bipolar analog input ranges: ±10 V, ±5 V
Single 5 V analog supply and 2.3 V to 5 V VDRIVE
Fully integrated data acquisition solution
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
Second-order antialiasing analog filter
On-chip accurate reference and reference buffer
16-bit ADC with 200 kSPS on all channels
Oversampling capability with digital filter
Flexible parallel/serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Performance
7 kV ESD rating on analog input channels
95.5 dB SNR, −107 dB THD
±0.5 LSB INL, ±0.5 LSB DNL
Low power: 100 mW
Standby mode: 25 mW
Temperature range: −40°C to +85°C
64-lead LQFP package
APPLICATIONS
Power-line monitoring and protection systems
Multiphase motor control
Instrumentation and control systems
Multiaxis positioning systems
Data acquisition systems (DAS)
Table 1. High Resolution, Bipolar Input, Simultaneous
Sampling DAS Solutions
Resolution
Single-
Ended
Inputs
True Number of
Differential Simultaneous
Inputs
Sampling Channels
18 Bits
AD7608 AD7609
8
16 Bits
AD7606
8
AD7606-6
6
AD7606-4
4
14 Bits
AD7607
8
V1
V1GND
V2
V2GND
V3
V3GND
V4
V4GND
V5
V5GND
V6
V6GND
V7
V7GND
V8
V8GND
CLAMP 1M
CLAMP
1M
CLAMP 1M
CLAMP
1M
CLAMP 1M
CLAMP
1M
CLAMP 1M
CLAMP
1M
CLAMP 1M
CLAMP 1M
CLAMP 1M
CLAMP
1M
CLAMP 1M
CLAMP
1M
CLAMP 1M
CLAMP
1M
FUNCTIONAL BLOCK DIAGRAM
AVCC
AVCC
REGCAP REGCAP REFCAPB REFCAPA
RFB
RFB
SECOND-
ORDER LPF
T/H
RFB
RFB
SECOND-
ORDER LPF
T/H
RFB
RFB
SECOND-
ORDER LPF
T/H
RFB
RFB
SECOND-
ORDER LPF
T/H
RFB
RFB
SECOND-
ORDER LPF
T/H
RFB
RFB
SECOND-
ORDER LPF
T/H
RFB
RFB
SECOND-
ORDER LPF
T/H
RFB
RFB
SECOND-
ORDER LPF
T/H
2.5V
LDO
2.5V
LDO
2.5V
REF
8:1
MUX
16-BIT
SAR
SERIAL
DIGITAL
FILTER
PARALLEL/
SERIAL
INTERFACE
AD7606
CLK OSC
CONTROL
INPUTS
PARALLEL
AGND
CONVST A CONVST B RESET RANGE
Figure 1.
REFIN/REFOUT
REF SELECT
AGND
OS 2
OS 1
OS 0
DOUTA
DOUTB
RD/SCLK
CS
PAR/SER/BYTE SEL
VDRIVE
DB[15:0]
BUSY
FRSTDATA
Rev. E
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Technical Support
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AD7606/AD7606-6/AD7606-4
TABLE OF CONTENTS
Features........................................................................................... 1
Applications................................................................................... 1
Functional Block Diagram............................................................ 1
Revision History............................................................................ 2
General Description...................................................................... 3
Specifications................................................................................. 4
Timing Specifications................................................................ 7
Absolute Maximum Ratings....................................................... 11
Thermal Resistance ................................................................. 11
ESD Caution............................................................................. 11
Pin Configurations and Function Descriptions........................ 12
Typical Performance Characteristics.......................................... 17
Terminology................................................................................. 21
Theory of Operation.................................................................... 22
Converter Details..................................................................... 22
REVISION HISTORY
5/2018—Rev. D to Rev. E
Changes to Patent Note, Note 1.....................................................3
Changes to tCONV Parameter, Table 3..............................................7
11/2017—Rev. C to Rev. D
Changes to Features Section..........................................................1
Changes to Specifications Table Summary...................................3
Deleted Endnote 1, Table 1; Renumbered Sequentially...............6
Change to Table 6.........................................................................14
Changes to Typical Performance Characteristics Section.........17
Changes to Terminology Section.................................................21
Changes to Ordering Guide.........................................................34
1/2012—Rev. B to Rev. C
Changes to Analog Input Ranges Section...................................22
Data Sheet
Analog Input............................................................................ 22
ADC Transfer Function.......................................................... 23
Internal/External Reference.................................................... 24
Typical Connection Diagram.................................................. 25
Power-Down Modes................................................................ 25
Conversion Control................................................................. 26
Digital Interface ........................................................................... 27
Parallel Interface (PAR/SER/BYTE SEL = 0)......................... 27
Parallel Byte (PAR/SER/BYTE SEL = 1, DB15 = 1).............. 27
Serial Interface (PAR/SER/BYTE SEL = 1)............................ 27
Reading During Conversion................................................... 28
Digital Filter............................................................................. 29
Layout Guidelines.................................................................... 32
Outline Dimensions.................................................................... 34
Ordering Guide........................................................................ 34
10/2011—Rev. A to Rev. B
Changes to Input High Voltage (VINH) and Input Low Voltage
(VINL) Parameters and Endnote 6, Table 2....................................4
Changes to Table 3..........................................................................7
Changes to Table 4........................................................................11
Changes to Pin 32 Description, Table 6......................................13
Changes to Analog Input Clamp Protection Section.................22
Changes to Typical Connection Diagram Section.....................25
8/2010—Rev. 0 to Rev. A
Changes to Note 1, Table 2.............................................................6
5/2010—Revision 0: Initial Version
Rev. E | Page 2 of 36

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Data Sheet
GENERAL DESCRIPTION
The AD76061/AD7606-6/AD7606-4 are 16-bit, simultaneous
sampling, analog-to-digital dataacquisition systems (DAS) with
eight, six, and four channels, respectively.Each part contains
analog input clamp protection,a second-orderantialiasing filter,
a track-and-holdamplifier, a 16-bit charge redistributionsuccessive
approximation analog-to-digital converter (ADC), a flexible
digital filter, a 2.5 V reference andreference buffer, andhigh
speed serial and parallel interfaces.
The AD7606/AD7606-6/AD7606-4 operate from a single 5 V
supply andcan accommodate ±10 V and±5 V true bipolarinput
signals while sampling at throughputratesup to 200 kSPS for
AD7606/AD7606-6/AD7606-4
all channels. The input clamp protection circuitry can tolerate
voltages up to ±16.5 V. The AD7606 has 1 MΩ analog input
impedance regardlessof sampling frequency. The single supply
operation, on-chip filtering, andhigh inputimpedance eliminate
the need fordriver opampsand external bipolarsupplies. The
AD7606/AD7606-6/AD7606-4 antialiasing filter hasa 3 dB cutoff
frequency of 22 kHz and provides40 dB antialiasrejectionwhen
sampling at200 kSPS. The flexible digital filteris pin driven,yields
improvementsin SNR, and reducesthe 3 dB bandwidth.
1 Protected by US Patent Number 8,072,360.
Rev. E | Page 3 of 36

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AD7606/AD7606-6/AD7606-4
Data Sheet
SPECIFICATIONS
VREF = 2.5 V external/internal, AVCC = 4.75 V to 5.25 V, VDRIVE = 2.3 V to 5.25 V, fSAMPLE = 200 kSPS, TA = −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio (SNR)1,2
Signal-to-(Noise + Distortion) (SINAD)1
Dynamic Range
Total Harmonic Distortion (THD)1
Peak Harmonic or Spurious Noise (SFDR)1
Intermodulation Distortion (IMD)1
Second-Order Terms
Third-Order Terms
Channel-to-Channel Isolation1
ANALOG INPUT FILTER
Full Power Bandwidth
tGROUP DELAY
DC ACCURACY
Resolution
Differential Nonlinearity1
Integral Nonlinearity1
Total Unadjusted Error (TUE)
Positive Full-Scale Error1,4
Positive Full-Scale Error Drift
Positive Full-Scale Error Matching1
Bipolar Zero Code Error1, 5
Bipolar Zero Code Error Drift
Bipolar Zero Code Error Matching1
Negative Full-Scale Error1,4
Negative Full-Scale Error Drift
Negative Full-Scale Error Matching1
Test Conditions/Comments
fIN = 1 kHz sine wave unless otherwise noted
Oversampling by 16; ±10 V range; fIN = 130 Hz
Oversampling by 16; ±5 V range; fIN = 130 Hz
No oversampling; ±10 V Range
No oversampling; ±5 V range
No oversampling; ±10 V range
No oversampling; ±5 V range
No oversampling; ±10 V range
No oversampling; ±5 V range
fa = 1 kHz, fb = 1.1 kHz
fIN on unselected channels up to 160 kHz
−3 dB, ±10 V range
−3 dB, ±5 V range
−0.1 dB, ±10 V range
−0.1 dB, ±5 V range
±10 V Range
±5 V Range
No missing codes
±10 V range
±5 V range
External reference
Internal reference
External reference
Internal reference
±10 V range
±5 V range
±10 V range
± 5 V range
±10 V range
± 5 V range
±10 V range
±5 V range
External reference
Internal reference
External reference
Internal reference
±10 V range
±5 V range
Min
94
93
88.5
87.5
88
87
16
Typ
95.5
94.5
90
89
90
89
90.5
90
−107
−108
−110
−106
−95
23
15
10
5
11
15
Max
−95
±0.5 ±0.99
±0.5 ±2
±6
±12
±8 ±32
±8
±2
±7
5 32
16 40
±1 ±6
±3 ±12
10
5
18
6 22
±8 ±32
±8
±4
±8
5 32
16 40
Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
kHz
kHz
kHz
kHz
µs
µs
Bits
LSB3
LSB
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
LSB
LSB
LSB
LSB
µV/°C
µV/°C
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
LSB
LSB
Rev. E | Page 4 of 36

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Data Sheet
Parameter
ANALOG INPUT
Input Voltage Ranges
Analog Input Current
Input Capacitance6
Input Impedance
REFERENCE INPUT/OUTPUT
Reference Input Voltage Range
DC Leakage Current
Input Capacitance6
Reference Output Voltage
Reference Temperature Coefficient
LOGIC INPUTS
Input High Voltage (VINH)
Input Low Voltage (VINL)
Input Current (IIN)
Input Capacitance (CIN)6
LOGIC OUTPUTS
Output High Voltage (VOH)
Output Low Voltage (VOL)
Floating-State Leakage Current
Floating-State Output Capacitance6
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
POWER REQUIREMENTS
AVCC
VDRIVE
ITOTAL
Normal Mode (Static)
Normal Mode (Operational)7
Standby Mode
Shutdown Mode
Test Conditions/Comments
RANGE = 1
RANGE = 0
10 V; see Figure 31
5 V; see Figure 31
See the Analog Input section
See the ADC Transfer Function section
REF SELECT = 1
REFIN/REFOUT
ISOURCE = 100 µA
ISINK = 100 µA
Twos complement
All eight channels included; see Table 3
Per channel, all eight channels included
Digital inputs = 0 V or VDRIVE
AD7606
AD7606-6
AD7606-4
fSAMPLE = 200 kSPS
AD7606
AD7606-6
AD7606-4
AD7606/AD7606-6/AD7606-4
Min Typ
5.4
2.5
5
1
2.475
2.5
7.5
2.49/
2.505
±10
0.7 × VDRIVE
5
VDRIVE − 0.2
±1
5
Max Unit
±10 V
±5 V
µA
µA
pF
2.525
±1
V
µA
pF
V
ppm/°C
0.3 × VDRIVE
±2
V
V
µA
pF
V
0.2 V
±20 µA
pF
4
1
200
µs
µs
kSPS
4.75 5.25 V
2.3 5.25 V
16 22
14 20
12 17
mA
mA
mA
20 27
18 24
15 21
58
26
mA
mA
mA
mA
µA
Rev. E | Page 5 of 36