FPF2488.pdf 데이터시트 (총 11 페이지) - 파일 다운로드 FPF2488 데이타시트 다운로드

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February 2015
FPF2488
Dual Channel Over-Voltage Protection Load Switch
Features
Dual Channel Power Switch (VBUS and VIF)
Surge Protection under IEC 61000-4-5
- VBUS: ±100 V
- VIF: ± 40 V
Input Voltage Range
- VBUS: 2.5 V ~ 23 V
- VIF: 3.1 V ~ 5.5 V
Max Continuous Current Capability
- VBUS: 2.5 A
- VIF: 6 A
Ultra Low On-Resistance
- VBUS: Typ. 33 mΩ
- VIF: Typ. 10 mΩ
Over Voltage Protection
- VBUS: 10 V ± 100 mV
- VIF: 5.25 V ± 250 mV
LDO Output based VBUS_DET for VBUS Detection
Active Low Control for VBUS Path
OTG Functionality on VBUS Path
Conditional Active High Control for VIF Path
Reverse-Current Blocking for VIF Path
Applications
Mobile Handsets and Tablets
Wearable Devices
Description
The FPF2488 features a 2-channel power switch, which
offers surge protection and Over-Voltage Protection
(OVP), to protect downstream components and
enhancing overall system robustness.
Channel one (VBUS) is an active-low, 28 V/2.5 A rated,
power MOSFET switch with an internal clamp
supporting ±100 V surge protection, highly accurate
fixed OVP at 10.0 V (±100 mV), and OTG functionality.
Channel two (VIF) is a conditional active-high, 6 V/6 A
rated, power MOSFET switch with an integrated TVS
supporting ± 40 V surge protection and fixed OVP at
5.25 V (± 250 mV). VIF also provides Reverse Current
Blocking (RCB) during its OFF state to minimize
leakage current.
VBUS_DET is paired with always ON LDO to power
downstream devices even with VBUS is greater than
2.5 V, even when disabled through the ONB pin. This
provides power sequence control or a host controlled
configuration in system.
The FPF2488 is available in a 15-bump, 1.6 mm x
2.2 mm Wafer-Level Chip-Scale Package (WLCSP) with
0.4 mm pitch.
Related Resources
http://www.fairchildsemi.com/
Ordering Information
Part Number
FPF2488UCX
Operating Temperature
Range
Top Mark
Package
-40°C +85°C
GW 15-Ball, 0.4 mm Pitch WLCSP
Packing
Method
Tape & Reel
© 2014 Fairchild Semiconductor Corporation
FPF2488 • Rev. 1.6
www.fairchildsemi.com

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Application Diagram
Travel
Adapter
VBUS
VOUT
Test JIG
VIF BAT
FPF2488
ONB
ON
VBUS_DET
GND
Battery
Charger
System
BATTERY
PMIC
Block Diagram
Figure 1. Typical Application
VBUS
VIF
ONB
FPF2488
TVS
OVLO
RCB
TVS
UVLO
OVLO
THERMAL
SHUTDOWN
CONTROL
LOGIC
w/ Charge
pump
VBUS
LDO
Figure 2.
GND
Functional Block Diagram
VOUT
BAT
VBUS_DET
ON
© 2014 Fairchild Semiconductor Corporation
FPF2488 Rev. 1.6
2
www.fairchildsemi.com

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Pin Configuration
1 23
A
VOUT
VOUT
ONB
B
ON
VBUS
VBUS
C
GND
GND
VBUS_
DET
D BAT
VIF
VIF
E BAT BAT VIF
3 21
ONB
VOUT
VOUT
A
VBUS
VBUS
ON
B
VBUS_
DET
GND
GND
C
VIF VIF BAT D
VIF BAT BAT E
Figure 3. Pin Configuration (Top View)
Figure 4. Pin Configuration (Bottom View)
Pin Definitions
Name
VBUS
VOUT
VIF
BAT
VBUS_DET
ON
ONB
GND
Bump
B2, B3
A1, A2
D2, D3, E3
D1, E1, E2
C3
B1
A3
C1, C2
Type
Description
Input/Supply Switch Input and Device Supply
Output Switch Output to Load
Input/Supply
Output
Output
Input
Input
GND
Switch Input and Device Supply
Switch Output to Battery
Regulated Output according to VBUS
Active HIGH: VIF path only and when BAT is valid prior to VIF
Active LOW: VBUS path only
Ground
© 2014 Fairchild Semiconductor Corporation
FPF2488 Rev. 1.6
3
www.fairchildsemi.com

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Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min. Max. Unit
VBUS
VBUS to GND & VBUS to VOUT=GND or Float
VIF VIF to GND
VOUT
VOUT to GND
BAT BAT to GND
VBUS_DET VBUS_DET to GND
VON(B)
ONB or ON to GND
IIN_VBUS
Continuous VBUS Current
Peak VBUS Current (5 ms)
IIN_VIF
Continuous VIF Current
Peak VIF Current (5 ms)
IIN_VBUS_DET Continuous VBUS_DET Current
tPD Total Power Dissipation at TA=25°C
TSTG
Storage Temperature Range
TJ Maximum Junction Temperature
TL Lead Temperature (Soldering, 10 Seconds)
JA Thermal Resistance, Junction-to-Ambient(2) (1-in.2 Pad of 2-oz. Copper)
IEC 61000-4-2 System Air Discharge
Level ESD
Contact Discharge
ESD
Electrostatic Discharge
Capability
Human Body Model,
ANSI/ESDA/JEDEC JS- All Pins
001-2012
Charged Device Model,
JESD22-C101
All Pins
Surge
IEC 61000-4-5,
Surge Protection
VBUS
VIF
Notes:
1. Pulsed, 50 ms maximum non-repetitive.
2. Measured using 2S2P JEDEC std. PCB.
-0.3
-2(1)
-0.3
-0.3
-65
15.0
8.0
29.0 V
6V
VIN + 0.3 V
VIF + 0.3 V
8V
6V
2.5 A
5A
6A
12 A
1 mA
1.54 W
+150 °C
+150 C
+260 C
81(2) °C/W
2 kV
1
±100
±40
V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
VBUS Supply Voltage, VBUS
VIF Supply Voltage, VIF
CIN / COUT Input and Output Capacitance
CVBUS_DET Output Capacitance
TA Operating Temperature
Min.
2.5
3.1
0.1
0.47
-40
Max.
23.0
5.5
+85
Unit
V
V
μF
μF
°C
© 2014 Fairchild Semiconductor Corporation
FPF2488 Rev. 1.6
4
www.fairchildsemi.com

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Electrical Characteristics
Unless otherwise noted, VBUS=2.5 to 23 V, VIF=3.1 to 5.5 V, TA=-40 to 85°C; Typical values are at VBUS=5 V, IIN ≤ 2 A,
VIF=4 V, CIN=0.1 μF and TA=25°C.
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
Basic Operation
IQ
IIN_Q
TSDN
TSDN_HYS
Input Quiescent Current
OVLO Supply Current
Thermal Shutdown(3)
Thermal Shutdown
Hysteresis(3)
VBUS=5 V, ONB=0 V, VBUS_DET=Floating
VIF=4 V
VBUS=12 V, VOUT=0 V, VBUS_DET=Floating
VIF=5.5 V, BAT=0 V
160 250 μA
100 150 μA
150 205 μA
100 180 μA
140 °C
20 °C
VBUS to VOUT Switch
VBUS_CLAMP Input Clamping Voltage
VBUS_OVLO Over-Voltage Trip Level
RON_VBUS On-Resistance
tDEB_VBUS
tSTART_VBUS
tON_VBUS
Debounce Time
Soft-Start Time
Switch Turn-On Time
tOFF_VBUS Switch Turn-Off Time
VIF to BAT Switch
VIF_CLAMP Input Clamping Voltage
VIF_UVLO Under-Voltage Trip Level
VIF_OVLO
RON_VIF
IRCB
tDEB_VIF
Over-Voltage Trip Level
On-Resistance
Reverse Current
Debounce Time
tQUAL_VIF Qualification Time
tON_VIF
Switch Turn-On Time
tOFF_VIF Switch Turn-Off Time
IIN=10 mA
VBUS Rising, TA=-40 to 85°C
VBUS Falling, TA=-40 to 85°C
VBUS=5 V, IOUT=1 A, TA=25°C
VBUS=9 V, IOUT=1 A, TA=25°C
Time from VBUS_MIN < VBUS < VBUS_OVLO to
VOUT=0.1 × VBUS
Time from VBUS=VBUS_MIN to 0.1 × VBUS_DET
RL=100 Ω, CL=22 µF, VOUT from 0.1 × VBUS
to 0.9 × VBUS
RL=100 Ω, No CL, VBUS > VBUS_OVLO to
VOUT=0.8 × VBUS
IIN=10 mA
VIF Rising, TA=-40 to 85°C
VIF Falling, TA=-40 to 85°C
VIF Rising, TA=-40 to 85°C
VIF Falling, TA=-40 to 85°C
VIF=3.1 V, IOUT=1 A, TA=25°C
VIF=0 V, BAT=4.4 V
Time from VIF_UVLO < VIF < VIF_OVLO to
BAT=0.1 × VIF
BAT > VIH_BAT First, Time from ON >
VIH_ON(B) to BAT Voltage Increase
RL=100 Ω, CL=22 µF, VOUT from 0.1 × VIF to
0.9 × VIF
RL=100 Ω, No CL,VIN > VOVLO to VOUT=0.8 ×
VIF
9.9
9.8
5.00
4.8
35
10.0
33
33
15
30
3
6.4
2.85
2.7
5.25
10
3
15
30
3
10.1
39
39
150
3.05
5.50
15
7
150
V
V
V
mΩ
mΩ
ms
ms
ms
ns
V
V
V
V
V
mΩ
μA
ms
ms
ms
ns
Note:
3. Guaranteed by characterization and design.
Continued on the following page…
© 2014 Fairchild Semiconductor Corporation
FPF2488 Rev. 1.6
5
www.fairchildsemi.com