A018AN03-V1.pdf 데이터시트 (총 25 페이지) - 파일 다운로드 A018AN03-V1 데이타시트 다운로드

No Preview Available !

Doc. version : 8
Tota l pa ges : 23
Date
: 2003.06.26
Product Specification
1.8COLOR TFT-LCD MODULE
MODEL NAME: A018AN03 V1
< >Preliminary Specification
<> Final Specification
Note: The content of this
specification is subject to
change.
© 2002 AU Optronics
All Rights Reserved,
Do Not Copy.

No Preview Available !

Version :
Page :
8
1/ 23
Record of Revision
Version Revise Date
0 09/May/2002
Page
First draft.
Content
1 2 7/May./200 2
15 Revised the error
17 Revised the error
18 Add the extraction block of display data
2 31/May/2002
7 VCAC,VGL-AC: 5.2V5.6V
Dc-Dc block
8 Output voltage: 13V13.5V; Vref: 1.25V1.2V
12 Add FPC reliability test item
13 Update outline drawing
21 Updated R.C parameter
22 Cosmetic specification included
3 31/Oct/2002
6 Vcom from 5.2 to 5.6
7 VGL_H from 10 to 7.1
Delete data set-up time and data hold time on table
8 and Tc à Tv c
9 Delete sel0 sel1 in note fo drawing
18 Hsync CLK 1560 à360
19 Modify drawing (pixel arrangment)
4 03/Dec/2002 20 Modif y d rawi n g
5 09/Dec/2002
5 Correct note 4
7 Remove LED typical voltage and add LED maximum voltage
6 07/Apr/2003
2 Revised the footnote
5 Modif y d rawi n g (B OTTE NàBOTTOM)
5 Add Note 6
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PRPER SHALL NOT BE REPRODUCED, COPIED, OR
TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.

No Preview Available !

Version :
Page :
8
2/ 23
4 Add Note 6 to Pin assignment 13:SHDB
5 Add Note 6 to Pin assignment 28:GRB
7 Add output signal voltage H leavel: VOH MAX:VCC
8 Add DCLK Frequency MAX:6.0, Min:5.37
7 15/May/2003 22 Correct Fig.22 Application circuit R112àOPEN, R111à10K
8 20/Jun/2003
Add Customer can ignore the power-up sequence if connecting
7 GRB to LCD backlight control signal, LCD_BLin Note 5;
change the 2nd Note 5 to Note 7.
8 Remove Vcom in Table 3, Absolute Maximum Ratings
Add AVDD1=4.0V(min), 5.6V(Typ), and 6.0V(Max) in Table a;
9
add Note 5
9 Add IDD1 =0.5mA(Typ), and 0.7mA(Max) in Table b.
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PRPER SHALL NOT BE REPRODUCED, COPIED, OR
TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.

No Preview Available !

Version :
Page :
8
3/ 23
Contents:
A. Physical specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P5
B. Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P6
1. Pin assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P6
a .TFT-LCD panel driving section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P7
b .L ED Backlight driving section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P8
2. Equivalent circuit of I/O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P8
3.Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P8
4. Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P9
a . Typical operating conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P9
b . Current consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P9
c. LED driving conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
P10
5. AC Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P10
a . Timing conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P10
b . Timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P11
6. DC-DC conv erter circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P11
a. Boost conv erter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P11
b. Shutdown mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P12
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PRPER SHALL NOT BE REPRODUCED, COPIED, OR
TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.

No Preview Available !

Version :
Page :
8
4/ 23
c. Oscillator circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P12
C. Optical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P13
D. Reliability test items. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P15
E. Packing form. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P16
Appendix:
Fig1 DC-DC conv erter bloc k diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P11
Fig2 DCCK block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P12
Fig3.PWM control state diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P12
Fig.4 Outline dimension of TFT-LCD module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P17
Fig.5 Input signal timing relationship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P18
Fig.6 Vertical Input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P19
Fig.7 Horizontal input timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P20
Fig.8 Extraction of display data from memory to Panel. . . . . . . . . . . . . . . . . . . P21
Fig.9 Hsync, Vsync, Data, DCLk relationship. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P22
Fig.10 Application circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P23
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PRPER SHALL NOT BE REPRODUCED, COPIED, OR
TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.