MCP6V62.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 MCP6V62 데이타시트 다운로드

No Preview Available !

MCP6V61/1U/2/4
80 µA, 1 MHz Zero-Drift Op Amps
Features
• High DC Precision:
- VOS Drift: ±15 nV/°C (maximum, VDD = 5.5V)
- VOS: ±8 µV (maximum)
- AOL: 125 dB (minimum, VDD = 5.5V)
- PSRR: 117 dB (minimum, VDD = 5.5V)
- CMRR: 120 dB (minimum, VDD = 5.5V)
- Eni: 0.54 µVP-P (typical), f = 0.1 Hz to 10 Hz
- Eni: 0.17 µVP-P (typical), f = 0.01 Hz to 1 Hz
• Enhanced EMI Protection:
- Electromagnetic Interference Rejection Ratio
(EMIRR) at 1.8 GHz: 101 dB
• Low Power and Supply Voltages:
- IQ: 80 µA/amplifier (typical)
- Wide Supply Voltage Range: 1.8V to 5.5V
• Small Packages:
- Singles in SC70, SOT-23
- Duals in MSOP-8, 2x3 TDFN
- Quads in TSSOP-14
• Easy to Use:
- Rail-to-Rail Input/Output
- Gain Bandwidth Product: 1 MHz (typical)
- Unity Gain Stable
• Extended Temperature Range: -40°C to +125°C
Typical Applications
• Portable Instrumentation
• Sensor Conditioning
• Temperature Measurement
• DC Offset Correction
• Medical Instrumentation
Design Aids
• SPICE Macro Models
• FilterLab® Software
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
Related Parts
• MCP6V11/1U/2/4: Zero-Drift, Low Power
• MCP6V31/1U/2/4: Zero-Drift, Low Power
• MCP6V71/1U/2/4: Zero-Drift, 2 MHz
• MCP6V81/1U: Zero-Drift, 5 MHz
• MCP6V91/1U: Zero-Drift, 10 MHz
General Description
The Microchip Technology Inc. MCP6V61/1U/2/4
family of operational amplifiers provides input offset
voltage correction for very low offset and offset drift.
These devices have a gain bandwidth product of
1 MHz (typical). They are unity-gain stable, have
virtually no 1/f noise and have good Power Supply
Rejection Ratio (PSRR) and Common Mode Rejection
Ratio (CMRR). These products operate with a single
supply voltage as low as 1.8V, while drawing
80 µA/amplifier (typical) of quiescent current.
The Microchip Technology Inc. MCP6V61/1U/2/4 op
amps are offered in single (MCP6V61 and
MCP6V61U), dual (MCP6V62) and quad (MCP6V64)
packages. They were designed using an advanced
CMOS process.
Package Types
MCP6V61
SOT-23
MCP6V62
MSOP
VOUT 1
VSS 2
VIN+ 3
5 VDD VOUTA 1
VINA– 2
4 VIN– VINA+ 3
VSS 4
8 VDD
7 VOUTB
6 VINB
5 VINB+
MCP6V61U
SC70, SOT-23
MCP6V62
2×3 TDFN *
VIN+ 1
VSS 2
VIN– 3
5 VDD VOUTA 1
8 VDD
VINA– 2
4 VOUT VINA+ 3
EP
9
7 VOUTB
6 VINB
VSS 4
5 VINB+
MCP6V64
TSSOP
VOUTA 1
VINA– 2
VINA+ 3
VDD 4
VINB+ 5
VINB– 6
VOUTB 7
14 VOUTD
13 VIND
12 VIND+
11 VSS
10 VINC+
9 VINC
8 VOUTC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
2014-2015 Microchip Technology Inc.
DS20005367B-page 1

No Preview Available !

MCP6V61/1U/2/4
Typical Application Circuit
R1
VIN
R2
C2
R4
VDD/2
-
R2
+
R5
U2
MCP6V61
R3
-
VOUT
+ U1
MCP6XXX
VDD/2
Offset Voltage Correction for Power Driver
Figures 1 and 2 show input offset voltage versus ambi-
ent temperature for different power supply voltages.
8
28 Samples
6 VDD = 1.8V
4
2
0
-2
-4
-6
-8
-50
-25 0 25 50 75 100
Ambient Temperature (°C)
125
FIGURE 1:
Input Offset Voltage vs.
Ambient Temperature with VDD = 1.8V.
8
28 Samples
6 VDD = 5.5V
4
2
0
-2
-4
-6
-8
-50 -25
0 25 50 75
Temperature (°C)
100 125
FIGURE 2:
Input Offset Voltage vs.
Ambient Temperature with VDD = 5.5V.
As seen in Figures 1 and 2, the MCP6V61/1U/2/4 op
amps have excellent performance across temperature.
The input offset voltage temperature drift (TC1) shown
is well within the specified maximum values of
15 nV/°C at VDD = 5.5V and 30 nV/°C at VDD = 1.8V.
This performance supports applications with stringent
DC precision requirements. In many cases, it will not be
necessary to correct for temperature effects (i.e.,
calibrate) in a design. In the other cases, the correction
will be small.
DS20005367B-page 2
2014-2015 Microchip Technology Inc.

No Preview Available !

MCP6V61/1U/2/4
1.0 ELECTRICAL
CHARACTERISTICS
1.1 Absolute Maximum Ratings †
VDD – VSS .................................................................................................................................................................6.5V
Current at Input Pins ..............................................................................................................................................±2 mA
Analog Inputs (VIN+ and VIN-) (Note 1).....................................................................................VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ....................................................................................................VSS – 0.3V to VDD + 0.3V
Difference Input Voltage .................................................................................................................................|VDD – VSS|
Output Short Circuit Current ........................................................................................................................... Continuous
Current at Output and Supply Pins ...................................................................................................................... ±30 mA
Storage Temperature .............................................................................................................................-65°C to +150°C
Maximum Junction Temperature .......................................................................................................................... +150°C
ESD protection on all pins (HBM, CDM, MM)
MCP6V61/1U   4 kV, 1.5 kV, 400V
MCP6V62/4  4 kV, 1.5 kV, 300V
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: See Section 4.2.1 “Rail-to-Rail Inputs”.
1.2 Specifications
TABLE 1-1: DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND,
VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 20 kto VL and CL = 30 pF (refer to Figures 1-4 and 1-5).
Parameters
Sym. Min. Typ. Max. Units Conditions
Input Offset
Input Offset Voltage
Input Offset Voltage Drift with
Temperature (Linear Temp. Co.)
Input Offset Voltage Quadratic
Temp. Co.
Input Offset Voltage Aging
VOS
-8
TC1 -30
TC1 -15
TC2
TC2
VOS
-30
-6
±0.45
+8 µV TA = +25°C
+30 nV/°C TA = -40 to +125°C,
VDD = 1.8V (Note 1)
+15 nV/°C TA = -40 to +125°C,
VDD = 5.5V
(Note 1)
— pV/°C2 TA = -40 to +125°C
VDD = 1.8V
— pV/°C2 TA = -40 to +125°C
VDD = 5.5V
— µV 408 hours Life Test at
+150°,
measured at +25°C.
Power Supply Rejection Ratio
PSRR 117
134
— dB
Note 1: For design guidance only; not tested.
2: Figure 2-19 shows how VCML and VCMH changed across temperature for the first production lot.
3: Parts with date codes prior to September 2015 (week code 27) were screened to a +5 nA maximum limit.
4: Parts with date codes prior to September 2015 (week code 27) were screened to ±2 nA minimum/maxi-
mum limits.
2014-2015 Microchip Technology Inc.
DS20005367B-page 3

No Preview Available !

MCP6V61/1U/2/4
TABLE 1-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND,
VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 20 kto VL and CL = 30 pF (refer to Figures 1-4 and 1-5).
Parameters
Sym. Min. Typ. Max. Units Conditions
Input Bias Current and Impedance
Input Bias Current
Input Bias Current across
Temperature
Input Offset Current
Input Offset Current across
Temperature
Common Mode Input Impedance
Differential Input Impedance
Common Mode
IB
IB
IB
IOS
IOS
IOS
ZCM
ZDIFF
-50
0
-200
-800
±1
+20
+0.2
±60
±50
±50
1013||8
1013||8
+50
+1.5
+200
+800
pA
pA
nA
pA
pA
pA
||pF
||pF
TA = +85°C
TA = +125°C (Note 3)
TA = +85°C
TA = +125°C (Note 4)
Common Mode
Input Voltage Range Low
VCML
VSS-0.2
V Note 2
Common Mode
Input Voltage Range High
VCMH VDD+0.3
— V Note 2
Common Mode Rejection Ratio
CMRR 111
128
— dB VDD = 1.8V,
VCM = -0.2V to 2.1V
(Note 2)
CMRR 120
134
— dB VDD = 5.5V,
VCM = -0.2V to 5.8V
(Note 2)
Open-Loop Gain
DC Open-Loop Gain (Large Signal)
Output
Minimum Output Voltage Swing
AOL 114
AOL 125
VOL
VSS
146 — dB VDD = 1.8V,
VOUT = 0.3V to 1.6V
158 — dB VDD = 5.5V,
VOUT = 0.3V to 5.3V
VSS+35 VSS+121 mV RL = 2 k, G = +2,
0.5V input overdrive
VOL
VSS+3.5
mV RL = 20 k, G = +2,
0.5V input overdrive
Maximum Output Voltage Swing
VOH VDD-121 VDD–35 VDD mV RL = 2 k, G = +2,
0.5V input overdrive
VOH
VDD–3.5
mV RL = 20 k, G = +2,
0.5V input overdrive
Output Short Circuit Current
Power Supply
ISC — ±7 — mA VDD = 1.8V
ISC — ±23 — mA VDD = 5.5V
Supply Voltage
VDD
1.8
5.5 V
Quiescent Current per Amplifier
IQ 40 80 130 µA IO = 0
Power-on Reset (POR) Trip Voltage
VPOR
0.9
1.6 V
Note 1: For design guidance only; not tested.
2: Figure 2-19 shows how VCML and VCMH changed across temperature for the first production lot.
3: Parts with date codes prior to September 2015 (week code 27) were screened to a +5 nA maximum limit.
4: Parts with date codes prior to September 2015 (week code 27) were screened to ±2 nA minimum/maxi-
mum limits.
DS20005367B-page 4
2014-2015 Microchip Technology Inc.

No Preview Available !

MCP6V61/1U/2/4
TABLE 1-2: AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND,
VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 20 kto VL and CL = 30 pF (refer to Figures 1-4 and 1-5).
Parameters
Sym. Min. Typ. Max. Units
Conditions
Amplifier AC Response
Gain Bandwidth Product
GBWP — 1 — MHz
Slew Rate
SR — 0.45 — V/µs
Phase Margin
PM — 60 — °C G = +1
Amplifier Noise Response
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni — 0.17 — µVP-P f = 0.01 Hz to 1 Hz
Eni — 0.54 — µVP-P f = 0.1 Hz to 10 Hz
eni — 26 — nV/Hz f < 2 kHz
ini — 5 — fA/Hz
Amplifier Distortion (Note 1)
Intermodulation Distortion (AC) IMD — 48 — µVPK VCM tone = 50 mVPK at 1 kHz,
GN = 11, RTI
Amplifier Step Response
Start-Up Time
Offset Correction Settling Time
tSTR
tSTL
Output Overdrive Recovery Time tODR
— 250 —
— 30 —
— 60 —
µs G = +1, 0.1% VOUT settling (Note 2)
µs G = +1, VIN step of 2V,
VOS within 100 µV of its final value
µs G = -10, ±0.5V input overdrive to VDD/2,
VIN 50% point to VOUT 90% point (Note 3)
EMI Protection
EMI Rejection Ratio
EMIRR — 80 —
dB VIN = 0.1 VPK, f = 400 MHz
— 96 —
VIN = 0.1 VPK, f = 900 MHz
— 101 —
VIN = 0.1 VPK, f = 1800 MHz
— 102 —
VIN = 0.1 VPK, f = 2400 MHz
Note 1: These parameters were characterized using the circuit in Figure 1-6. In Figures 2-40 and 2-41, there is an
IMD tone at DC, a residual tone at 1 kHz and other IMD tones and clock tones. IMD is Referred to
Input (RTI).
2: High gains behave differently; see Section 4.3.3 “Offset at Power-Up”.
3: tSTL and tODR include some uncertainty due to clock edge timing.
TABLE 1-3: TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +1.8V to +5.5V, VSS = GND
Parameters
Sym. Min. Typ. Max. Units
Conditions
Temperature Ranges
Specified Temperature Range
TA -40 — +125
°C
Operating Temperature Range
Storage Temperature Range
TA -40 — +125
TA -65 — +150
°C Note 1
°C
Thermal Package Resistances
Thermal Resistance, 5LD-SC70
JA — 209 —
°C/W
Thermal Resistance, 5LD-SOT-23
JA — 201 —
°C/W
Thermal Resistance, 8L-2x3 TDFN
JA — 53 — °C/W
Thermal Resistance, 8L-MSOP
JA — 211 —
°C/W
Thermal Resistance, 14L-TSSOP
JA — 100 —
°C/W
Note 1: Operation must not cause TJ to exceed the Maximum Junction Temperature specification (+150°C).
2014-2015 Microchip Technology Inc.
DS20005367B-page 5