_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 6805-Serles Microprocessors and Microcomputers
CDP6805G2, CDP6805G2C
(;:SE(NS0ITI~VE~~:~*~~W////:0:I W&.:J~ffi
ONLY
~ t LCH
1920 teye
RESET
--------------------------------
~2* ------------------------~
.. INTERNAL TIMING SIGNALS NOT AVAILABLE EXTERNALLY,
* * REPRESENTS THE INTERNAL GATING OF THE CSCI INPUT PIN.
92CS-38101
Fig. 6 - Stop recovery and power-on RESET.
FUNCTIONAL PIN DESCRIPTION
VDD and VSS
Power IS supplied to the MCU uSing these two pins. VDD
IS power and VSS IS ground.
iRO (MASKABLE INTERRUPT REQUEST)
IRQ is mask option selectable With the choice of Interrupt
sensitivity being both level- and negative-edge or negatlve-
edge only.The MCU completes the current Instruction
before It responds to the request. If IRQ IS low and the Inter-
rupt mask bit II bit) In the condition code register IS clear, the
MCU beginS an Interrupt sequence at the end of the current
instruction.
If the mask option IS selected to Include level sensitivity,
then the IRQ Input requires an external resistor to VDD for
"wire-OR" operation. See the Interrupt section for more
detail
RESET
The RESET Input IS not required for start-up but can be
used to reset the MCU's Internal state and provide an orderly
software start-up procedure. Refer to the Reset section for a
detailed deSCription
TIMER
The TIMER Input may be used as an external clock for the
on-chip lImer Refer to Timer section for a detailed deSCrip-
tion.
NUM - NON-USER MODE
This pin IS Intended for use In self-check only User ap-
plications should connect this pin to ground through a 10 kO
resistor
OSC1,OSC2
The CDP6805G2 can be configured to accept either a
crystal input or an RC network. Additionally, the internal
clocks can be derived by either a divide-by-two or divide-
by-four of the external frequency (fOSC). Both of these
options are mask selectable.
RC - If the RC oscillator option IS selected, then a resistor
IS connected to the oscillator pms as shown In Figure 71b)
The relationship between Rand fosc IS shown In Figure 8.
CRYSTAL - The circuit shown In Figure 71a) IS recom-
mended when uSing a crystal. The Internal oscillator IS
deSigned to Interface With an AT-cut parallel resonant quartz
crystal resonator In the frequency range specified for fosc In
the electrical characteristics table. USing an external CMOS
oscillator IS suggested when crystals outside the specified
ranges are to be used. The crystal and components should
be mounted as close as possible to the Input pins to minimize
output distortion and start-up stabilization time Crystal fre-
quency limits are also affected by VDD. Refer to Control
Timing Characteristics for limits. See Table 1
EXTERNAL CLOCK - An external clock should be ap-
plied to the OSC1 Input With the OSC2 Input not connected,
as shown In Figure 71e). An external clock may be used With
either the RC or crystal oscillator mask option. toxOV or
t)LCH do not apply when uSing an external clock input.
III
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