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120 mA, Current Sinking,
10-Bit, I2C DAC
AD5398A
FEATURES
Current sink: 120 mA
2-wire, (I2C-compatible) 1.8 V serial interface
10-bit resolution
Integrated current sense resistor
Power supply: 2.7 V to 5.5 V
Guaranteed monotonic over all codes
Power down to: 0.5 μA typical
Internal reference
Ultralow noise preamplifier
Power-down function
Power-on reset
Available in 3 × 3 array WLCSP package
APPLICATIONS
Consumer
Lens autofocus
Image stabilization
Optical zoom
Shutters
Iris/exposure
Neutral density (ND) filters
Lens covers
Camera phones
Digital still cameras
Camera modules
Digital video cameras/camcorders
Camera-enabled devices
Security cameras
Web/PC cameras
Industrial
Heater control
Fan control
Cooler (Peltier) control
Solenoid control
Valve control
Linear actuator control
Light control
Current loop control
GENERAL DESCRIPTION
The AD5398A is a single, 10-bit digital-to-analog converter
(DAC) with a current sink output capability of 120 mA. This
device features an internal reference and operates from a
single 2.7 V to 5.5 V supply. The DAC is controlled via a
2-wire (1.8 V, I2C®-compatible) serial interface that operates
at clock rates up to 400 kHz.
The AD5398A incorporates a power-on reset circuit, which
ensures the DAC output powers up to 0 V and remains there
until a valid write takes place. It has a power-down feature
that reduces the current consumption of the device to 0.5 μA
typically.
The AD5398A is designed for autofocus, image stabilization,
and optical zoom applications in camera phones, digital still
cameras, and camcorders. The AD5398A is also suitable for
many industrial applications, such as controlling temperature,
light, and movement without derating, over temperatures
ranging from 30°C to +85°C. The I2C address range for the
AD5398A is 0x18 to 0x1F inclusive.
FUNCTIONAL BLOCK DIAGRAM
VDD
AD5398A
REFERENCE
SDA
SCL
I2C SERIAL
INTERFACE
10-BIT
CURRENT
OUTPUT DAC
POWER-ON
RESET
VDD
D1
ISINK
PD
R
RSENSE
3.3
DGND
DGND
Figure 1.
AGND
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.

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AD5398A
TABLE OF CONTENTS
Features .............................................................................................. 1
Consumer Applications ................................................................... 1
Industrial Applications .................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AC Specifications.......................................................................... 4
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
REVISION HISTORY
10/08—Revision 0: Initial Version
Pin Configuration and Function Descriptions..............................6
Typical Performance Characteristics ..............................................7
Terminology .......................................................................................9
Theory of Operation ...................................................................... 10
Serial Interface ............................................................................ 10
I2C Bus Operation ...................................................................... 10
Data Format ................................................................................ 11
Power Supply Bypassing and Grounding................................ 12
Applications Information .............................................................. 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
Rev. 0 | Page 2 of 16

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AD5398A
SPECIFICATIONS
VDD = 2.7 V to 5.5 V, AGND = DGND = 0 V, load resistance (RL) = 25 Ω connected to VDD; all specifications TMIN to TMAX,
unless otherwise noted.
Table 1.
Parameter
DC PERFORMANCE
B Version1
Min Typ Max
Resolution
Relative Accuracy2
Differential Nonlinearity2, 3
Zero Code Error2, 4
Offset Error @ Code 162
Gain Error2
Offset Error Drift2, 4, 5
Gain Error Drift2, 5
OUTPUT CHARACTERISTICS
Minimum Sink Current4
Maximum Sink Current
0
10
±1.5 ±4
±1
0.5 1
0.5
±0.6
10
±0.2 ±0.5
3
120
Output Current During PD5
Output Compliance5
0.6
80
VDD
Output Compliance5
0.48
VDD
Power-Up Time5
LOGIC INPUT (PD)5
Input Current
Input Low Voltage, VINL
Input High Voltage, VINH
Pin Capacitance
LOGIC INPUTS (SCL, SDA)5
Input Low Voltage, VINL
Input High Voltage, VINH
Input Low Voltage, VINL
Input High Voltage, VINH
Input Leakage Current, IIN
Input Hysteresis, VHYST
Digital Input Capacitance, CIN
Glitch Rejection6
POWER REQUIREMENTS
VDD
IDD (Normal Mode)
1.26
−0.3
1.26
−0.3
1.4
0.05 VDD
2.7
20
3
6
0.5
±1
0.54
+0.54
VDD + 0.3
+0.54
VDD + 0.3
±1
50
5.5
1
IDD (Power-Down Mode)7
0.5
Unit
Bits
LSB
LSB
mA
mA
% of FSR
μA/°C
LSB/°C
Test Conditions/Comments
VDD = 3.6 V to 4.5 V; device operates over 2.7 V to 5.5 V
with reduced performance
117 μA/LSB
Guaranteed monotonic over all codes
All 0s loaded to DAC
at 25°C
mA
mA VDD = 3.6 V to 4.5 V; device operates over 2.7 V to 5.5 V;
specified maximum sink current may not be achieved
nA PD = 1
V Output voltage range over which maximum 120 mA
sink current is available
V Output voltage range over which 90 mA sink current
is available
μs To 10% of FS, coming out of power-down mode; VDD = 5 V
μA
V VDD = 2.7 V to 5.5 V
V VDD = 2.7 V to 5.5 V
pF
V VDD = 2.7 V to 3.6 V
V VDD = 2.7 V to 3.6 V
V VDD = 3.6 V to 5.5 V
V VDD = 3.6 V to 5.5 V
μA VIN = 0 V to VDD
V
pF
ns Pulse width of spike suppressed
V
mA IDD specification is valid for all DAC codes;
VIH = VDD, VIL = GND, VDD = 5.5 V
μA VIH = VDD, VIL = GND, VDD = 3 V
1 Temperature range for the B version is −30°C to +85°C.
2 See the Terminology section.
3 Linearity is tested using a reduced code range: Code 32 to Code 1023.
4 To achieve near zero output current, use the power-down feature.
5 Guaranteed by design and characterization; not production tested. PD is active high. SDA and SCL pull-up resistors are tied to 1.8 V.
6 Input filtering on both the SCL and SDA inputs suppresses noise spikes that are less than 50 ns.
7 PD is active high. When PD is taken high, the AD5389A enters power-down mode.
Rev. 0 | Page 3 of 16

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AD5398A
AC SPECIFICATIONS
VDD = 2.7 V to 5.5 V, AGND = DGND = 0 V, RL = 25 Ω connected to VDD, unless otherwise noted.
Table 2.
Parameter
Output Current Settling Time
Slew Rate
Major Code Change Glitch Impulse
Digital Feedthrough3
B Version1, 2
Min Typ Max
250
Unit
μs
0.3 mA/μs
0.15 nA-sec
0.06 nA-sec
Test Conditions/Comments
VDD = 5 V, RL = 25 Ω, LL = 680 μH
¼ scale to ¾ scale change (0x100 to 0x300)
1 LSB change around major carry
1 Temperature range for the B version is –30°C to +85°C.
2 Guaranteed by design and characterization; not production tested.
3 See the Terminology section.
TIMING SPECIFICATIONS
VDD = 2.7 V to 5.5 V. All specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter1
fSCL
t1
t2
t3
t4
t5
t6 2
t7
t8
t9
t10
t11
Cb
B Version
Limit at TMIN, TMAX
400
2.5
0.6
1.3
0.6
100
0.9
0
0.6
0.6
1.3
300
0
250
300
20 + 0.1 Cb3
400
Unit
kHz max
μs min
μs min
μs min
μs min
ns min
μs max
μs min
μs min
μs min
μs min
ns max
ns min
ns max
ns max
ns min
pF max
Description
SCL clock frequency
SCL cycle time
tHIGH, SCL high time
tLOW, SCL low time
tHD, STA, start/repeated start condition hold time
tSU, DAT, data setup time
tHD, DAT, data hold time
tSU, STA, setup time for repeated start
tSU, STO, stop condition setup time
tBUF, bus free time between a stop condition and a start condition
tR, rise time of both SCL and SDA when receiving
Can be CMOS driven
tF, fall time of SDA when receiving
tF, fall time of both SCL and SDA when transmitting
Capacitive load for each bus line
1 Guaranteed by design and characterization; not production tested.
2 A master device must provide a hold time of at least 300 ns for the SDA signal (referred to the VIH MIN of the SCL signal) to bridge the undefined region of the SCL
falling edge.
3 Cb is the total capacitance of one bus line in pF. tR and tF are measured between 0.3 VDD and 0.7 VDD.
Timing Diagram
SDA
t9 t3 t10
t11
t4
SCL
t4
START
CONDITION
t6 t2 t5
t7
REPEATED
START
CONDITION
Figure 2. 2-Wire Serial Interface Timing Diagram
t1
Rev. 0 | Page 4 of 16
t8
STOP
CONDITION

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ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.1
Table 4.
Parameter
VDD to AGND
VDD to DGND
AGND to DGND
SCL, SDA to DGND
PD to DGND
ISINK to AGND
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature (TJ max)
θJA Thermal Impedance2
Mounted on 2-Layer Board
Mounted on 4-Layer Board
Lead Temperature, Soldering
Maximum Peak Reflow Temperature3
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V
−0.3 V to +0.3 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V
−40°C to +85°C
−65°C to +150°C
150°C
84°C/W
48°C/W
260°C (±5°C)
1 Transient currents of up to 100 mA do not cause SCR latch-up.
2 To achieve the optimum θJA, it is recommended that the AD5398A be
soldered onto a 4-layer board.
3 As per Jedec J-STD-020C.
AD5398A
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
ESD CAUTION
Rev. 0 | Page 5 of 16