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DATASHEET
Power Factor Correction Controllers
ISL6731A, ISL6731B
The ISL6731A and ISL6731B are active power factor
correction (PFC) controller ICs that use a boost topology. The
controllers are suitable for AC/DC power systems up to 2kW
and over the universal line input.
The ISL6731A and ISL6731B operate in Continuous Current
Mode (CCM). Accurate input current shaping is achieved with a
current error amplifier. A patent pending breakthrough
negative capacitance technology minimizes zero crossing
distortion and reduces the magnetic components size. The
small external components result in lower design cost without
sacrificing performance.
The internally clamped 12.5V gate driver delivers 1.5A peak
current to the external power MOSFET. The ISL6731A and
ISL6731B provide a highly reliable system that is fully
protected. Protection features include cycle-by-cycle
overcurrent, over power limit, over-temperature, input
brownout, output overvoltage and undervoltage protection.
The ISL6731A and ISL6731B provide excellent power
efficiency and transitions into a power saving skip mode
during light load conditions, thus improving efficiency
automatically. The ISL6731A and ISL6731B can be shut down
by pulling the FB pin below 0.5V or grounding the BO pin.
Two switching frequency options are provided. The ISL6731B
switches at 62kHz, and the ISL6731A switches at 124kHz.
Related Literature
AN1884, "ISL6731AEVAL1Z and ISL6731BEVAL1Z: Boost
CCM PFC for 300W Universal Input Adaptors"
AN1885, “ISL6731AEVAL2Z and ISL6731BEVAL2Z: High
Performance Boost CCM PFC Front End for Server Power
Applications”
Features
• Reduced component size requirements
- Enables smaller, thinner AC/DC adapters
- Choke and cap size can be reduced
- Lower cost of materials
• Excellent power factor and THD over line and load
- CCM mode with negative capacitance generator for
smaller EMI filter and improved performance
- Built-in current amplifier with flexibility of gain change
• Better light-load efficiency
- Automatic pulse skipping with programmable threshold
- Programmable or automatic shutdown
• Highly reliable design
- Cycle-by-cycle current limit
- Input average power limit
- OVP and OTP protection
- Input brownout protection
• Small 14 Ld SOIC package
Applications
• Desktop computer AC/DC adaptor
• Laptop computer AC/DC adaptor
• TV AC/DC power supply
• AC/DC brick converters
VLINE
VI
+ VOUT
VCC
ISEN
GATE
ICOMP
OVP
VIN ISL6731A FB
GND
COMP
BO SKIP VREG
FIGURE 1. TYPICAL APPLICATION
100
95
90
85
80
75
70
65
60
0
ISL6731A, SKIP
ISL6731A, NON-SKIP
20 40 60
OUTPUT POWER (%)
FIGURE 2. PFC EFFICIENCY
80
100
February 13, 2015
FN8582.1
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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Pin Configuration
ISL6731A, ISL6731B
ISL6731A, ISL6731B
(14 LD SOIC)
TOP VIEW
NC 1
GND 2
ISEN 3
ICOMP 4
VIN 5
BO 6
OVP 7
14 GATE
13 NC
12 VCC
11 VREG
10 SKIP
9 FB
8 COMP
Pin Descriptions
PIN # I/O SYMBOL
DESCRIPTION
1, 13 -
NC Not Connected. Must be floating.
2-
GND Ground pin. All voltage levels refer to this pin.
3 I ISEN Current sense pin. The current through this pin is proportional to the inductor current.
4 I/O ICOMP Current error amplifier output pin.
5I
VIN Input voltage sense. This pin provides the reference voltage to shape inductor current. Connect this pin to a resistor divider
from the rectified input voltage. The resistor divider ratio is used to adjust the phase lag between input voltage and the
input current. The phase lag is required to compensate the phase lead generated by the EMI filter.
6 I/O
BO This pin should be decoupled to GND with a minimum 0.1µF ceramic capacitor. The BO pin is a voltage follower, which will
follow the DC voltage of the VIN pin. The BO pin is internally tied to GND through a resistor RIS. The decoupling capacitor
provides ripple filtering. When the voltage at the BO pin (VBO) drops below brownout voltage threshold, the controller
enters shutdown mode and the gate drive is disabled. The BO pin will be disabled when the FB pin drops below the enabling
threshold.
7I
OVP Overvoltage protection pin. Connect this pin to a resistor divider from the output. The resistor divider sets the OVP set point.
When the OVP pin voltage exceeds 104.5% of the reference voltage VREF, OVP is triggered and the gate drive is disabled.
8 I/O COMP Output of the error amplifier. The voltage of the COMP pin sets the input power. During start-up, a small charge current will
slowly ramp up the voltage of the COMP pin.
9I
10 I/O
11 -
FB
SKIP
VREG
Voltage feedback pin. Connect this pin to a resistor divider from the output. The resistor divider sets the output voltage.
When the FB pin voltage exceeds 104% of VREF, OVP is triggered and gate drive is disabled. When the FB pin drops below
10% of VREF, the device is put into shutdown mode. There is an internal pull-down current source for open loop protection.
This pin has dual functions. Connecting this pin to ground disables the light load skip function. An internal 20μA current
sources out of this pin. Connect a resistor from this pin to the ground to set the average power trip point. The converter
exits the skip mode when either the VFB drops below 88% of VREF, or the ISEN current goes above 29μA.
Output of internal regulator. The voltage having a ±2% tolerance over line, load and operating temperature. Bypass to GND
with a 47nF low ESR capacitor. VREG can source up to 10mA. This pin is not recommended for usage other than bypass.
12 I
VCC Power supply pin. The VCC pin should be decoupled to GND with a minimum 0.1µF ceramic capacitor.
14 O
GATE
Push-pull gate drive for the external MOSFET. Output voltage is clamped at 12.5V. This pin provides typically 2A sink and
1.5A source capability.
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ISL6731A, ISL6731B
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP.
RANGE (°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL6731AFBZ
ISL 6731AFBZ
-40 to +125
14 Ld SOIC
M14.15
ISL6731BFBZ
ISL 6731BFBZ
-40 to +125
14 Ld SOIC
M14.15
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6731A, ISL6731B. For more information on MSL please see techbrief
TB363.
TABLE 1. KEY DIFFERENCES IN FAMILY OF ISL6731
VERSION
ISL6731A
ISL6731B
Switching Frequency
124kHz
62kHz
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Block Diagram
EMI CHOKE
VLINE
CF3
DF1
DF2
Lm
LF
CF2
VI
CF1
L
D
Q1
COUT
VOUT
RCS
VCC
CREG
VREG
RIN2
RIN1
RSEN
ISEN
CURRENT
MIRROR
2:1
ICS > --I--O--2---C----
ICS
OTP
ICOMP
Gmi
IREF
0----.-2---B-5----O-¥----2-V----I--N--- C O M P B
CEQ GEN.
VCS = R-----I--S------¥---2--I-I---S----E-----N--
RIS
UVLO
LINEAR
REGULATOR
CONTROL
LOGIC
PWM
COMP
SKIP
OSCILLATOR
SOFT-START
ENABLE
VIN
COMPB SKIP
COMP-1V OVERPOWER
CLAMP
LIMIT
Gmv
20µA
VCC
Vro2
Vro1
Vref
IFB
GATE
GND
OVP
ROV1
ROV2
RFB2
FB
RFB1
BO
CBO
SKIP
COMP

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Application Schematics
Typical 300W Application Schematic
P1 AC1
F1 8A
UNIVERSAL INPUT C2
90~265Vac
470n
P4 AC2
PE
P5
L4
2.2m
2.2n 2.2n
C35 C36
D1
R1
L2
L1 1.5m
0u
IN5406
D2 2
C3D04060A
SPP20N60C3
1
DC+
VOUT
TP9
P2
L3
2.2m
2M
C22
R3 470n
2M
DB1
GBU806
RV1
MOV /DNP
C3
680n
R28 0.22
R27 0.22
TP12
GATE1
R2
2.2
Q1
1
R4
51k
C19
C1 0.1
390V
270u
C21 450V
0.1
P3
2.2n 2.2n
R5 0.22
C5 C6
D8 D7
S1M S1M
R8
470k
C12
DNP
R11
470k
VIN
TP3
R13
5.76k
C8
220n
DZ1
3.3V
R23
C7
1u
C11
1n
R14
30k
6.8n
C10
47n
C20
DNP
VREGTP8
C9
1u
VCC
U1
VREG Lin.Reg. VCC
TP7
DNP
GATE
GATE 14
3.3M
R24
3.3M
R9
3k
TP6
ICOMP
TP5 ISEN
4 ICOMP
3
I MIRROR
ISEN 2:1
I*Vin*C
gmI*= 4*BO*BO
UVLO LOGIC
CEQ OTP
Gen
PWM
GND 2
OVP 7
C23
5 VIN
+
C SKIP OPL
2.5V 1n
gm FB 9
C13
47p
VCC
-
BO
SKIP
COMP
ISL6731A/B
3.3M
R6
R10
3.3M
DNP
TP11
OVP
42.2k
R25
GND
TP10
C26
2.2n
R26
49.9
TP1 FB
VCC
GND
P6
P7
R17
0
DNP P8
R21
25k
DNP
1
2N7002
Q2
DNP
TP4
69.8K
R22
BO
TP2
COMP
C16
100n
R19
42.2k
R18 C15
DNP
R20
10k
C17
1n
DNP
C14
470n
62k
C18
150n
DNP P9
1u