ISL6755.pdf 데이터시트 (총 17 페이지) - 파일 다운로드 ISL6755 데이타시트 다운로드

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ISL6755
FN6442.1
ZVS Full-Bridge PWM Controller with
Average Current Limit
The ISL6755 is a high-performance extension of the Intersil
family of full-bridge ZVS controllers. Like the ISL6753, it
achieves ZVS operation by driving the upper bridge FETs at
a fixed 50% duty cycle while the lower bridge FETS are
trailing-edge modulated with adjustable resonant switching
delays.
Adding to the ISL6753’s feature set is average current
monitoring. The signal may be used for average current
limiting, current sharing circuits and average current mode
control.
This advanced BiCMOS design features low operating
current, adjustable oscillator frequency up to 2MHz,
adjustable soft-start, precision deadtime and resonant delay
control, and short propagation delays. Additionally,
Multi-Pulse Suppression ensures alternating output pulses
at low duty cycles where pulse skipping may occur.
Ordering Information
PART
NUMBER
(Note)
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE PKG.
(Pb-free) DWG. #
ISL6755AAZA* 6755 AAZ -40 to +105 20 Ld QSOP M20.15
*Add -T suffix to part number for tape and reel packaging
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Pinout
ISL6755
(20 LD QSOP)
TOP VIEW
VERR 1
CTBUF 2
RTD 3
RESDEL 4
CT 5
FB2 6
FB1 7
RAMP 8
CS 9
IOUT 10
20 VREF
19 SS
18 VDD
17 OUTLL
16 OUTLR
15 OUTUL
14 OUTUR
13 N/C
12 GND
11 GND
Features
• Adjustable Resonant Delay for ZVS Operation
• Voltage- or Current-Mode Operation
• 3% Current Limit Threshold
• Adjustable Average Current Limit
• 175µA Startup Current
• Supply UVLO
• Adjustable Deadtime Control
• Adjustable Soft-Start
• Adjustable Oscillator Frequency Up to 2MHz
• Tight Tolerance Error Amplifier Reference Over Line,
Load, and Temperature
• 5MHz GBWP Error Amplifier
• Adjustable Cycle-by-Cycle Peak Current Limit
• Fast Current Sense to Output Delay
• 70ns Leading Edge Blanking
• Multi-Pulse Suppression
• Buffered Oscillator Sawtooth Output
• Internal Over-Temperature Protection
• Pb-Free (RoHS Compliant)
Applications
• ZVS Full-Bridge Converters
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Functional Block Diagram
VDD
GND
VREF
RESDEL
IOUT
UVLO
OVER-
TEMPERATURE
PROTECTION
4X
VREF
CT
RTD
CTBUF
SS
OSCILLATOR
SAMPLE
AND
HOLD
VREF
50%
PWM
STEERING
LOGIC
PWM
+
- 1.00V
OVER CURRENT
COMPARATOR
+70 nS
LEADING
EDGE
BLANKING
VDD
OUTUL
OUTUR
OUTLL
OUTLR
CS
PWM
COMPARATOR
+
-
80mV
0.33
SOFTSTART
CONTROL
VREF
1 mA
RAMP
+ 0.6V
-
+
-
VERR
FB1
FB2

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Typical Application - High Voltage Input ZVS Full-Bridge Converter
VIN+
+
C1
400 VDC
CR2
Q8A
Q8B
Q1
R19
C9
T3 CR3
R20
C11
Q5A
Q5B
Q2
Q10A
Q10B
C10
Q9A
Q9B
VIN-
BIAS
Q6A
Q4 Q6B
Q7A Q3
Q7B
T2
CR1
R4
VDD
R5
R8
R7
R10
C2
R6
U1
C8 ISL6755
1 VERR
VREF 20
2 CTBUF
SS 19
R19 3 RTD
VDD 18
4 RESDEL OUTLL 17
5 CT
OUTLR 16
6 FB2
OUTUL 15
7 FB1
OUTUR 14
8 RAMP
N/C 13
9 CS
GND 12
10 IOUT
GND 11
R1 R2
C3 C4
R3
R9
R11
C5 C6
C7
C12 R12
T1
CR5
CR4
C13 R13
L1
C16
C16 +
RETURN
+ Vout
R18
R17
R16
C14
U2
C15 R15
U3
R14

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ISL6755
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +22.0V
OUTxxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VREF + 0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
Latchup (Note 3) . . . . . . . . . . . . . . . . . . . Class II, Level B @ +85°C
Operating Conditions
Temperature Range
ISL6755AAxx . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . 9VDC to 16VDC
Thermal Information
Thermal Resistance (Typical)
JA (°C/W)
20 Lead QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . .
88
Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
3. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are using a pulse limited to 50mA.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0k, CT = 470pF, TA = -40°C to +105°C, Typical values are at
TA = +25°C; Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY VOLTAGE
Supply Voltage
- - 20 -
Start-Up Current, IDD
Operating Current, IDD
UVLO START Threshold
VDD = 5.0V
RLOAD, COUT = 0
-
-
8.00
175
11.0
8.75
400
15.5
9.00
µA
mA
V
UVLO STOP Threshold
6.50 7.00 7.50
V
Hysteresis
- 1.75 -
V
REFERENCE VOLTAGE
Overall Accuracy
Long Term Stability
Operational Current (source)
IVREF = 0mA to -10mA
TA = +125°C, 1000 hours (Note 4)
4.850
-
-10
5.000
3
-
5.150
-
-
V
mV
mA
Operational Current (sink)
5 - - mA
Current Limit
CURRENT SENSE
VREF = 4.85V
-15
-
-100
mA
Current Limit Threshold
CS to OUT Delay
VERR = VREF
Excl. LEB
0.97 1.00 1.03
- 35 -
V
ns
Leading Edge Blanking (LEB) Duration
- 70 - ns
CS to OUT Delay + LEB
CS Sink Current Device Impedance
Input Bias Current
IOUT Sample and Hold Buffer Amplifier Gain
IOUT Sample and Hold VOH
IOUT Sample and Hold VOL
TA = +25°C
VCS = 1.1V
VCS = 0.3V
TA = +25°C
VCS = max, ILOAD = -300µA
VCS = 0.00V, ILOAD = 10µA
- - 150 ns
- - 20
-1.0 - 1.0 µA
3.85 4.00 4.15 V/V
3.9 - - V
- - 0.3 V
4 FN6442.1
September 29, 2008

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ISL6755
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0k, CT = 470pF, TA = -40°C to +105°C, Typical values are at
TA = +25°C; Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
RAMP
RAMP Sink Current Device Impedance
RAMP to PWM Comparator Offset
Bias Current
PULSE WIDTH MODULATOR
VRAMP = 1.1V
TA = +25°C
VRAMP = 0.3V
- - 20
65 80 95 mV
-5.0 - -2.0 µA
Minimum Duty Cycle
VERR < 0.6V
- - 0%
Maximum Duty Cycle (per half-cycle)
VERR = 4.20V, VRAMP = 0V,
VCS = 0V (Note 5)
RTD = 2.00k, CT = 220pF
- 94 - %
- 97 - %
Zero Duty Cycle VERR Voltage
VERR to PWM Comparator Input Offset
VERR to PWM Comparator Input Gain
Common Mode (CM) Input Range
ERROR AMPLIFIERS
Input Common Mode (CM) Range
GBWP
VERR VOL
VERR VOH
VERR Pull-Up Current Source
EA Reference
EA Reference + EA Input Offset Voltage
OSCILLATOR
Frequency Accuracy, Overall
Frequency Variation with VDD
Temperature Stability
Charge Current
Discharge Current Gain
CT Valley Voltage
CT Peak Voltage
CT Pk-Pk Voltage
RTD Voltage
RESDEL Voltage Range
CTBUF Gain (VCTBUFP-P/VCTP-P)
RTD = 2.00k, CT = 470pF
TA = +25°C
(Note 4)
-
0.85
0.7
0.31
0
(Note 4)
(Note 4)
ILOAD = 2mA
ILOAD = 0mA
VERR = 2.5V
TA = 25°C
0
5
-
4.20
0.8
0.594
0.590
(Note 4)
TA = +25°C, (F20V- - F10V)/F10V
VDD = 10V, |F-40°C - F0°C|/F0°C
|F0°C - F105°C|/F25°C
(Note 4)
TA = +25°C
Static Threshold
Static Threshold
Static Value
VCT = 0.8V, 2.6V
165
-10
-
-
-
-193
19
0.75
2.75
1.92
1.97
0
1.95
99
-
0.8
0.33
-
-
-
-
-
1.0
0.600
0.600
183
-
0.3
4.5
1.5
-200
20
0.80
2.80
2.00
2.00
-
2.0
-
1.20
0.9
0.35
VSS
VREF
-
0.4
-
1.3
0.606
0.612
201
+10
1.7
-
-
-207
23
0.88
2.88
2.05
2.03
2
2.05
%
V
V
V/V
V
V
MHz
V
V
mA
V
V
kHz
%
%
%
%
µA
µA/µA
V
V
V
V
V
V/V
5 FN6442.1
September 29, 2008