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HN27C256HG Series
32768-word × 8-bit CMOS UV Erasable and Programmable
ROM
ADE-203-
Maintenance only
Rev. 0.0
Dec. 1, 1995
Description
The Hitachi HN27C256HG is a 256-kbit ultraviolet erasable and electrically programmable ROM,
featuring sub-100-ns access times. The HN27C256HG realizes access time of 70 ns and 85 ns,
employing the advanced fine process and high speed circuitry technique. The timing conditions such as
access time or output hold time are designed as same as our byte-wide SRAMs’, allowing to use with
SRAMs on the same memory board by the same read timings. So its board design in 16-bit
microprocessor systems is easy. Also, the HN27C256HG realizes faster programming time than our
conventional 256-kbit EPROM by Hitachi’s Fast High-Reliability Programming Algorithm. Pin
arrangement, pin configuration and programming voltage are compatible with our 256-kbit EPROM
series, therefore existing programmers can be used with the HN27C256HG.
Features
• High speed: Access time 70/85 ns (max)
• Low power dissipation
Active mode: 30 mW (typ) (f = 1 MHz)
• High reliability and fast programming
Programming voltage: +12.5 V DC
Fast High-Reliability Programming Algorithm available
• Device identifier mode
Manufacturer code and device code
Ordering Information
Type No.
HN27C256HG-70
HN27C256HG-85
Access Time
70 ns
85 ns
Package
600-mil 28-pin cerdip (DG-28)
Note: This device is not available for new application.

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HN27C256HG Series
Pin Arrangement
VPP 1
A12 2
28 VCC
27 A14
A7 3
26 A13
A6 4
25 A8
A5 5
24 A9
A4 6
23 A11
A3 7
22 OE
A2 8
21 A10
A1 9
20 CE
A0 10
19 I/O7
I/O0 11
18 I/O6
I/O1 12
17 I/O5
I/O2 13
16 I/O4
VSS 14
15 I/O3
(Top View)
Pin Description
Pin Name
A0 A14
I/O0 I/O7
CE
OE
VCC
VPP
VSS
Function
Address
Input/output
Chip enable
Output enable
Power supply
Programming power supply
Ground
2

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Block Diagram
A4 – A9
A12 – A14
Address
I/O0
I/O7
CE
OE
VCC
VPP
VSS
H
HN27C256HG Series
512 × 512
Memory Matrix
Y-Gating
Y-Decoder
A0 – A3
A10, A11
H : High Threshold Inverter
3

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HN27C256HG Series
Mode Selection
Mode
CE
(20)
Read
VIL
Output disable
VIL
Standby
VIH
Program
VIL
Program verify
VIH
Optional verify
VIL
Program inhibit
VIH
Identifier
VIL
Notes: 1. X : Dont care.
2. VH : 12.0 V ± 0.5 V.
OE
(22)
VIL
VIH
X
VIH
VIL
VIL
VIH
VIL
A9
(24)
X
X
X
X
X
X
X
VH*2
VPP
(1)
VCC
VCC
VCC
VPP
VPP
VPP
VPP
VCC
VCC
(28)
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
I/O
(11 13, 15 19)
Dout
High-Z
High-Z
Din
Dout
Dout
High-Z
Code
Absolute Maximum Ratings
Parameter
Symbol
All input and output voltage*1
Vin, Vout
A9 input voltage*1
VPP voltage*1
VCC voltage*1
Operating temperature range
VID
VPP
VCC
Topr
Storage temperature range
Tstg
Storage temperature range under bias Tbias
Notes: 1. Relative to VSS.
2. Vin, Vout, VID min = 1.0 V for pulse width 50 ns.
Value
0.6*2 to +7.0
0.6*2 to +13.5
0.6 to +13.5
0.6 to +7.0
0 to +70
65 to +125
10 to +80
Unit
V
V
V
V
°C
°C
°C
Capacitance (Ta = 25°C, f = 1 MHz)
Parameter
Input capacitance
Output capacitance
Symbol Min Typ Max Unit Test Conditions
Cin
4
8
pF Vin = 0 V
Cout
8
12 pF Vout = 0 V
4

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Read Operation
HN27C256HG Series
DC Characteristics (Ta = 0 to +70°C, VCC = 5 V ± 10%, VPP = VCC)
Parameter
Symbol Min Typ Max Unit Test Conditions
Input leakage current
I LI
——2
µA Vin = 0 V to VCC
Output leakage current
I LO
2
µA Vout = 0 V to VCC
VPP current
IPP1
1
100 µA
VPP = 5.5 V
Standby VCC current
I SB
15
mA CE = VIH
Operating VCC current
I CC1
30
mA CE = VIL, Iout = 0 mA
I CC2
50
mA f = 15 MHz, Iout = 0 mA
I CC3
5
15 mA f = 1 MHz, Iout = 0 mA
Input low voltage*3
VIL
0.3*1
0.8 V
Input high voltage*3
VIH 2.2
VCC + 1.0*2 V
Output low voltage
VOL — — 0.45 V
IOL = 2.1 mA
Output high voltage
VOH1
2.4
V
IOH = 1.0 mA
VOH2
VCC 0.7
V
IOH = 100 µA
Notes: 1. VIL min = 1.0 V for pulse width 50 ns.
2. VIH max = VCC + 1.5 V for pulse width 20 ns.
If VIH is over the specified maximum value, read operation cannot be guaranteed.
3. Only defined for DC function test. VIL max = 0.45 V, VIH min = 2.4 V for AC function test.
5