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SSM9980M/GM
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
Lower gate charge
Fast switching characteristics
Description
D2
D2
D1
D1
SO-8
G2
S2
G1
S1
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
BV DSS
R DS(ON)
ID
80V
52m
4.6A
D1
G1 G2
D2
The SSM9980M is in the SO-8 package, which is widely preferred for
S1 S2
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters.
This device is available with Pb-free lead finish (second-level interconnect) as SSM9980GM.
Absolute Maximum Ratings
Symbol
Parameter
VDS
VGS
ID @ TA=25°C
ID @ TA=100°C
IDM
PD @ TA=25°C
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current3
Continuous Drain Current3
Pulsed Drain Current1
Total Power Dissipation
Linear Derating Factor
TSTG
TJ
Storage Temperature Range
Operating Junction Temperature Range
Rating
80
± 20
4.6
2.9
30
2
0.016
-55 to 150
-55 to 150
Units
V
V
A
A
A
W
W/°C
°C
°C
Thermal Data
Symbol
Rthj-a
Parameter
Thermal Resistance Junction-ambient3
Max.
Value
62.5
Unit
°C/W
12/10/2004 Rev.2.01
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SSM9980M/GM
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min. Typ. Max. Units
BVDSS
BVDSS/ Tj
RDS(ON)
VGS(th)
gfs
IDSS
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Drain-Source Breakdown Voltage
VGS=0V, ID=1mA
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
Static Drain-Source On-Resistance2 VGS=10V, ID=4.6A
Gate Threshold Voltage
Forward Transconductance
Drain-Source Leakage Current (Tj=25oC)
Drain-Source Leakage Current (Tj=70oC)
Gate-Source Leakage
Total Gate Charge2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VGS=4.5V, ID=3.6A
VDS=VGS, ID=250uA
VDS=10V, ID=4A
VDS=80V, VGS=0V
VDS=64V ,VGS=0V
VGS= ± 20V
ID=4A
VDS=64V
VGS=4.5V
VDS=40V
ID=1A
RG=3.3, VGS=10V
RD=40
VGS=0V
VDS=25V
f=1.0MHz
80 -
-V
- 0.08 - V/°C
- - 52 m
- - 60 m
1 - 3V
-7-S
- - 1 uA
- - 25 uA
- ±100 nA
- 19 30 nC
- 5 - nC
- 10 - nC
- 11 - ns
- 6 - ns
- 30 - ns
- 16 - ns
- 1820 2910 pF
- 130 - pF
- 94 - pF
Source-Drain Diode
Symbol
VSD
trr
Qrr
Parameter
Forward On Voltage2
Reverse Recovery Time2
Reverse Recovery Charge
Test Conditions
IS=1.6A, VGS=0V
IS=4A, VGS=0V,
dI/dt=100A/µs
Min. Typ. Max. Units
- - 1.2 V
- 44 - ns
- 90 - nC
Notes:
1.Pulse width limited by max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 135°C/W when mounted on min. copper pad.
12/10/2004 Rev.2.01
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70
60 T A =25 o C
50
40
10V
7.0V
5.0V
4.5V
30
20
V G =3.0V
10
0
0 2 4 6 8 10 12
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
55
I D =3.6A
T A =25 o C
50
45
50
40 T A =150 o C
30
SSM9980M/GM
10V
7.0V
5.0V
4.5V
20
V G =3.0V
10
0
0 2 4 6 8 10 12
V DS , Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
2.3
I D = 4.6 A
V G =10V
1.8
1.3
0.8
40
2 4 6 8 10 12
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance vs. Gate Voltage
4
3
2 T j =150 o C
1
T j =25 o C
0
0 0.2 0.4 0.6 0.8 1 1.2
V SD , Source-to-Drain Voltage (V)
Fig.5 Forward Characteristic of
Reverse Diode
1.4
0.3
-50
0
50 100
T j , Junction Temperature ( o C)
150
Fig 4. Normalized On-Resistance
vs. Junction Temperature
3
2.5
2
1.5
1
0.5
-50 0 50 100
T j ,Junction Temperature ( o C)
150
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
12/10/2004 Rev.2.01
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16
I D =4A
V DS =64V
12 V DS =50V
V DS =40V
8
4
0
0 10 20 30 40 50
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
100
10
1ms
1
10ms
0.1 T A =25 o C
Single Pulse
100ms
1s
0.01
0.1
DC
1 10 100
V DS , Drain-to-Source Voltage (V)
1000
Fig 9. Maximum Safe Operating Area
SSM9980M/GM
f=1.0MHz
10000
Ciss
1000
Coss
100 Crss
10
1 5 9 13 17 21 25 29
V DS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance Characteristics
1
0.1
0.01
Duty factor=0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
PDM
t
T
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja = 135°C/W
0.001
0.0001
0.001
0.01 0.1
1
t , Pulse Width (s)
10
100 1000
Fig 10. Effective Transient Thermal Impedance
VDS
90%
10%
VGS
td(on) tr
td(off) tf
VG
4.5V
QGS
QG
QGD
Charge
Q
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
12/10/2004 Rev.2.01
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SSM9980M/GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
12/10/2004 Rev.2.01
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