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K30 Sub-Family Reference Manual
Supports: MK30DX128ZVLQ10, MK30DX128ZVMD10,
MK30DX256ZVLQ10, MK30DX256ZVMD10, MK30DN512ZVLQ10,
MK30DN512ZVMD10
Document Number: K30P144M100SF2RM
Rev. 6, Nov 2011

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K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
2 Freescale Semiconductor, Inc.

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Section Number
Contents
Title
Page
Chapter 1
About This Document
1.1 Overview.......................................................................................................................................................................53
1.1.1 Purpose.........................................................................................................................................................53
1.1.2 Audience......................................................................................................................................................53
1.2 Conventions..................................................................................................................................................................53
1.2.1 Numbering systems......................................................................................................................................53
1.2.2 Typographic notation...................................................................................................................................54
1.2.3 Special terms................................................................................................................................................54
Chapter 2
Introduction
2.1 Overview.......................................................................................................................................................................55
2.2 K30 Family Introduction...............................................................................................................................................55
2.3 Module Functional Categories......................................................................................................................................55
2.3.1 ARM Cortex-M4 Core Modules..................................................................................................................56
2.3.2 System Modules...........................................................................................................................................57
2.3.3 Memories and Memory Interfaces...............................................................................................................58
2.3.4 Clocks...........................................................................................................................................................59
2.3.5 Security and Integrity modules....................................................................................................................59
2.3.6 Analog modules...........................................................................................................................................60
2.3.7 Timer modules.............................................................................................................................................60
2.3.8 Communication interfaces...........................................................................................................................61
2.3.9 Human-machine interfaces..........................................................................................................................62
2.4 Orderable part numbers.................................................................................................................................................62
Chapter 3
Chip Configuration
3.1 Introduction...................................................................................................................................................................65
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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Section Number
Title
Page
3.2 Core modules................................................................................................................................................................65
3.2.1 ARM Cortex-M4 Core Configuration..........................................................................................................65
3.2.2 Nested Vectored Interrupt Controller (NVIC) Configuration......................................................................68
3.2.3 Asynchronous Wake-up Interrupt Controller (AWIC) Configuration.........................................................74
3.2.4 JTAG Controller Configuration...................................................................................................................75
3.3 System modules............................................................................................................................................................76
3.3.1 SIM Configuration.......................................................................................................................................76
3.3.2 Mode Controller Configuration...................................................................................................................77
3.3.3 PMC Configuration......................................................................................................................................77
3.3.4 Low-Leakage Wake-up Unit (LLWU) Configuration.................................................................................78
3.3.5 MCM Configuration....................................................................................................................................80
3.3.6 Crossbar Switch Configuration....................................................................................................................80
3.3.7 Memory Protection Unit (MPU) Configuration...........................................................................................82
3.3.8 Peripheral Bridge Configuration..................................................................................................................85
3.3.9 DMA request multiplexer configuration......................................................................................................87
3.3.10 DMA Controller Configuration...................................................................................................................90
3.3.11 External Watchdog Monitor (EWM) Configuration....................................................................................91
3.3.12 Watchdog Configuration..............................................................................................................................92
3.4 Clock Modules..............................................................................................................................................................93
3.4.1 MCG Configuration.....................................................................................................................................93
3.4.2 OSC Configuration......................................................................................................................................94
3.4.3 RTC OSC configuration...............................................................................................................................95
3.5 Memories and Memory Interfaces................................................................................................................................95
3.5.1 Flash Memory Configuration.......................................................................................................................95
3.5.2 Flash Memory Controller Configuration.....................................................................................................99
3.5.3 SRAM Configuration...................................................................................................................................101
3.5.4 SRAM Controller Configuration.................................................................................................................104
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
4 Freescale Semiconductor, Inc.

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Section Number
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3.5.5 System Register File Configuration.............................................................................................................104
3.5.6 VBAT Register File Configuration..............................................................................................................105
3.5.7 EzPort Configuration...................................................................................................................................106
3.5.8 FlexBus Configuration.................................................................................................................................107
3.6 Security.........................................................................................................................................................................110
3.6.1 CRC Configuration......................................................................................................................................110
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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