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WNMD2173
WNMD2173
Dual N-Channel, 20V, 6A, Power MOSFET
www.sh-willsemi.com
Vsss (V)
Typ Rss(on) (mΩ)
26@ VGS=4.5V
27@ VGS=4.0V
20
30@ VGS=3.1V
33@ VGS=2.5V
ESD Rating:2000V HBM
Descriptions
The WNMD2173 is Dual N-Channel enhancement
MOS Field Effect Transistor and connecting the Drains
on the circuit board is not required because the Drains
of the MOSFET1 and the MOSFET2 are internally
connected. Uses advanced trench technology and
design to provide excellent RSS(ON) with low gate
charge. This device is designed for Lithium-Ion battery
protection circuit. The WNMD2173 is available in
CSP 4L package. Standard Product WNMD2173 is
Pb-free and Halogen-free.
Features
Trench Technology
Supper high density cell design
Excellent ON resistance for higher DC current
Extremely Low Threshold Voltage
Small package CSP 4L
MOSFET1
Gate 1
MOSFET2
Gate 2
Gate
Protection
Diode
Source 1
Body Diode
CSP 4L
Source 2
43
73
YW
12
1: Source 1
2: Gate 1
3: Gate 2
4: Source 2
73 = Device Code
Y = Year
W = WeekA~z
Pin configuration (TOP view)& Marking
Applications
Lithium-Ion battery protection circuit
Order information
Device
WNMD2173-4/TR
Package
CSP-4L
Shipping
3000/Reel&Tape
Will Semiconductor Ltd. 1 Jan, 2015 - Rev.1.3

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Electronics Characteristics (Ta=25oC, unless otherwise noted)
Parameter
Symbol
Test Conditions
OFF CHARACTERISTICS
Source to Source Voltage
Zero Gate Voltage Drain Current
VSSS
ISSS
VGS = 0 V, IS = 250uA
VSS =16 V, VGS = 0V
TEST CIRCUIT 1
Gate Leakage Current
VSS = 0 V, VGS = ±12V
IGSS
TEST CIRCUIT 2
ON CHARACTERISTICS
Gate to Source Cut-off Voltage
VGS(off)
VGS = VSS, IS = 250uA
TEST CIRCUIT 3
VGS = 4.5V, IS = 3.0A
TEST CIRCUIT 5
Source to Source On-state
Resistance
RSS(on)
VGS = 4.0V, IS = 3.0A
TEST CIRCUIT 5
VGS = 3.1V, IS = 3.0A
TEST CIRCUIT 5
VGS = 2.5V, IS = 3.0A
TEST CIRCUIT 5
Forward Transfer Admittance
| yfs |
VSS = 10 V, IS = 1.8A
TEST CIRCUIT 4
BODY DIODE CHARACTERISTICS
Body Diode Forward Voltage
VF(S-S)
VGS = 0 V, IF = 1.0A
TEST CIRCUIT 6
SWITCHING CHARACTERISTICS
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
tf
VGS = 4.5 V, VSS=10V,
RL=3.3 , IS=3A,RG=6
TEST CIRCUIT 8
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
CISS
COSS
CRSS
VGS = 0 V, f = 1kHz,
VSS = 10 V
TEST CIRCUIT 7
Total Gate Charge
Threshold Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
QG(TOT)
QG(TH)
QGS
QGD
VG1S1 = 4.5 V, VSS = 10V,
IS =6A
TEST CIRCUIT 9
WNMD2173
Min Typ Max Unit
20 V
1 uA
±10 uA
0.4 0.7 1.0 V
17 26 31
18 27 33 mΩ
19 30 43
21 33 52
9S
1.5 V
520
2080
7440
6480
1240
332
189
17.8
0.65
2.5
5.1
ns
pF
nC
Will Semiconductor Ltd. 2 Jan, 2015 - Rev.1.3

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Absolute Maximum ratings
Parameter
Source to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VSS = 0 V)
Source Current (pulse)Note.c
Source Current (DC)
Channel Temperature
Storage Temperature Range
Note.c PW≤10μs, duty cycle≤1%;
WNMD2173
Symbol
VSSS
VGSS
IS(pulse)
IS
Tch
Tstg
10 s Steady State
20
±12
60
6
150
-55 to 150
Unit
V
A
A
°C
°C
Both the FET1 and the FET2 are measured. Test circuits are example of measuring the FET1 side.
TEST CIRCUIT 1 ISSS
G2
G1
S2
S1
TEST CIRCUIT 2 IGSS
When FET1 is
measured, between
A GATE and SOURCE
of FET2 are shorted.
VSS
VGS
G2
G1
AA
S2
S1
TEST CIRCUIT 3 VGS(off)
When FET1 is
measured, between
GATE and SOURCE
of FET2 are shorted.
G2
G1
VGS
S2
AA
TEST CIRCUIT 4 | yfs |
ΔIS/ΔVGS
G2
VSS
S1
G1
VGS
S2
AA
VSS
S1
Will Semiconductor Ltd. 3 Jan, 2015 - Rev.1.3

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WNMD2173
TEST CIRCUIT 5 RSS(on)
VSS/IS
G2
S2
G1
VGS
VSS
V
S1
TEST CIRCUIT 6 VF(S-S)
When FET1 is measured,
FET2 is added VGS +4.5 V. 4.5 V
IS G2
G1
VGS
=0V
S2
IF
VSS
V
S1
TEST CIRCUIT 7
Ciss
G2
G1
Capacitance
Bridge
Coss
S2
Crss
S2
VSS
S1
Capacitance
Bridge
G2
G1
VSS
S1
Capacitance
Bridge
S2
G2
VSS
G1
S1
TEST CIRCUIT 8 td(on), tr, td(off), tf
G2
VGS
0
τ
PG.
τ = 1 μs
Duty Cycle 1%
G1
RG
S2
V
S1
RL
VDD
VGS
VGS
Wave Form
10%
0
VGS 90%
VSS
90%
VSS
VSS
Wave Form 0
td(on)
10% 10%
tr td(off)
90%
tf
ton toff
TEST CIRCUIT 9 QG
S2
G2
IG = 2 mA
G1
PG.
50 Ω
AA
RL
VDD
S1
Will Semiconductor Ltd. 4 Jan, 2015 - Rev.1.3

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Typical Characteristics (Ta=25oC, unless otherwise noted)
15
TEST CIRCUIT 5
10
VGS=1.5V
VGS=2.5V
VGS=3.0V
V =4.0V
GS
VGS=4.5V
VGS=10.0V
100
80
60
WNMD2173
TEST CIRCUIT 5
IS=3.0A
5
0
0.0 0.2 0.4 0.6 0.8
VSS-Source to Source Voltage-V
SOURCE CURRENT vs.
SOURCE TO SOURCE VOLTAGE
35
TEST CIRCUIT 5
VGS=2.5V
1.0
30 VGS=3.1V
VGS=4.0V
25
VGS=4.5V
20
2345
IS - Source Current(A)
6
SOURCE TO SOURCE ON-STATE RESISTANCE vs.
SOURCE CURRENT
55
TEST CIRCUIT 5
50 IS=3.0A
45
40
35
30
25 VGS=4.5V
20
VGS=4.0V
VGS=3.1V
15 VGS=2.5V
10
-50 0 50 100
T -Channel Temperature-oC
ch
150
SOURCE TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
40
20
0 2 4 6 8 10
VGS-Gate-to-Source Voltage(V)
SOURCE TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
1.4
TEST CIRCUIT 3
1.2 IS=250uA
1.0
0.8
0.6
0.4
-50 -25 0 25 50 75 100 125 150
Tch - Channel Temperature (oC)
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
TEST CIRCUIT 7
VGS=0V
f=1kHz
1000
Crss
C
oss
C
iss
100
5 10 15 20
VSS-Source to Source Voltage-V
CAPACITANCE vs. SOURCE TO SOURCE VOLTAGE
Will Semiconductor Ltd. 5 Jan, 2015 - Rev.1.3