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8/2014
J270, J271
P-Channel Silicon Junction Field-Effect Transistor
Analog Switch
Sample and Hold
Low Noise, High Gain Amplifier
Absolute maximum ratings at TA = 25oC
Reverse Gate Source & Gate Drain Voltage -30V
Continuous Forward Gate Current
50 mA
Continuous Device Power Dissipation 360 mW
Power Derating
2.8 mW/oC
At 25oC free air temperature
Static Electrical Characteristics
Gate Source Breakdown
Voltage
V(BR)GSS
Gate Reverse Current
IGSS
Gate Source Cutoff Voltage
VGS(OFF)
Drain Saturation Current
(pulsed)
IDSS
Dynamic Electrical Characteristics
Common-Source Forward
Transconductance
gfs
Common-Source Input
Capacitance
Ciss
Common-Source Reverse
Transfer Capacitance
Crss
Typical
Equivalent Short Circuit Input
Noise Voltage
~eN
J270
Min Max
-30
200
0.5 2
-2 -15
6 15
32
4
6
J271
Min Max
-30
200
1.5 4.5
-6 -50
8 18
32
4
6
Unit
V
pA
V
mA
Process PJ99
Test Conditions
IG = 1 uA, VDS = 0 V
VGS = 10 V, VDS = 0 V
VDS = -10 V, VGS = 0 V
VDS = -10 V, VGS = 0 V
mS
VDS = -10 V, VGS = 0 V
f=1
kHz
pF
VDS = -10 V, VGS = 0 V
f=1
MHz
pF
VDS = -10 V, VGS = 0 V
f=1
MHz
nV/√Hz VDS = 10 V, ID = 5 mA
f=1
kHz
SMP2608, SMP2609
715 N. Glenville Dr., Ste. 400
Richardson, TX 75089
(972) 238-9700 Fax (972) 238-5338
SMPJ270, SMPJ271
www.interfet.com