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Date:- 18 Feb, 2004
Data Sheet Issue:- 1
Anode-Shorted Gate Turn-Off Thyristor
Type G1000L#250
Absolute Maximum Ratings
VDRM
VRSM
VRRM
VDC-link
VOLTAGE RATINGS
Repetitive peak off-state voltage, (note 1).
Non-repetitive peak off-state voltage, (note 1).
Repetitive peak reverse voltage.
Maximum continuous DC-link voltage.
MAXIMUM
LIMITS
2500
2500
18
1400
UNITS
V
V
V
V
ITGQM
Ls
IT(AV)M
IT(RMS)
ITSM
ITSM2
I2t
di/dtcr
PFGM
PRGM
IFGM
VRGM
toff
ton
Tj op
Tstg
RATINGS
Maximum turn-off current, (note 2).
Snubber loop inductance, ITM=ITGQM, (note 2).
Mean on-state current, Tsink=55°C (note 3).
Nominal RMS on-state current, 25°C (note 3).
Peak non-repetitive surge current tp=10ms.
Peak non-repetitive surge current, (Note 4)
I2t capacity for fusing tp=10ms.
Critical rate of rise of on-state current, (note 5).
Peak forward gate power.
Peak reverse gate power.
Peak forward gate current.
Peak reverse gate voltage (note 6).
Minimum permissible off-time, ITM=ITGQM, (note 2).
Minimum permissible on-time.
Operating temperature range.
Storage temperature range.
Notes:-
1) VGK=-2Volts.
2) Tj=125°C, VD=80%VDM, VDM<VDRM, diGQ/dt=20A/µs, CS=2µF.
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) Half-sinewave, tp=2ms
5) For di/dt>1000A/µs, consult factory.
6) May exceed this value during turn-off avalanche period.
MAXIMUM
LIMITS
1000
0.3
500
970
7.5
8.9
125x103
1000
160
8
100
18
80
20
-40 to +125
-40 to +150
UNITS
A
µH
A
A
kA
kA
A2s
A/µs
W
kW
A
V
µs
µs
°C
°C
Data Sheet. Type G1000L#250 Issue 1
Page 1 of 13
February, 2004

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Characteristics
Anode-Shorted Gate Turn-Off Thyristor type G1000L#250
PARAMETER
VTM Maximum peak on-state voltage.
IL Latching current.
IH Holding current.
dv/dtcr Critical rate of rise of off-state voltage.
IDM Peak off state current.
IRM Peak reverse current.
IGKM Peak negative gate leakage current.
VGT Gate trigger voltage.
IGT Gate trigger current.
td Delay time.
tgt Turn-on time.
tf Fall time.
tgq Turn-off time.
Igq Turn-off gate current.
Qgq Turn-off gate charge.
ttail Tail time.
tgw Gate off-time (see note 3).
RthJK Thermal resistance junction to sink.
F Mounting force.
Wt Weight
MIN
-
-
-
1000
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
120
-
-
-
10
-
-
TYP MAX TEST CONDITIONS
- 2.5 IG=2A, IT=1000A.
10 50 Tj=25°C.
10 50 Tj=25°C.
- - VD=80%VDRM, VGR=-2V.
- 30 Rated VDRM, VGR=-2V
- 50 Rated VRRM
- 50 VGR=-16V
1.2 - Tj=-40°C.
1.0 - Tj=25°C. VD=24V, RL=100m
0.8 - Tj=125°C.
1.5 4.0 Tj=-40°C.
0.8 2.0 Tj=25°C.
VD=24V, RL=100m
0.3 0.7 Tj=125°C.
VD=50%VDRM, ITGQ=1000A, IGM=20A, diG/dt=20A/µs
1.0 -
Tj=25°C, di/dt=300A/µs, (10%IGM to 90%VD).
2.0 - Conditions as for td, (10%IGM to 10%VD).
VD=50%VDRM, ITGQ=1000A, CS=2µF,
1.0 -
diGQ/dt=25A/µs, VGR=-16V, (90%ITGQ to 10%IVD).
16
280
2000
40
-
19 Conditions as for tf, (10%IGQ to 10%ITGQ).
- Conditions as for tf.
3000 Conditions as for tf.
60 Conditions as for tf, (10%ITGQ to ITGQ<1A).
- Conditions as for tf.
- 0.05 Double side cooled.
- 0.13 Cathode side cooled.
- 0.08 Anode side cooled.
- 12 (see note 2).
300 - Housing option LL
170 - Housing option LM
UNITS
V
A
A
V/µs
mA
mA
mA
V
V
V
A
A
A
µs
µs
µs
µs
A
µC
µs
µs
K/W
K/W
K/W
kN
g
Notes:-
1) Unless otherwise indicated Tj=125oC.
2) For other clamping forces, consult factory.
3) The gate off-time is the period during which the gate circuit is
required to remain low impedance to allow for the passage
of tail current.
Data Sheet. Type G1000L#250 Issue 1
Page 2 of 13
February, 2004

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Anode-Shorted Gate Turn-Off Thyristor type G1000L#250
Notes on ratings and characteristics.
1. Maximum Ratings.
1.1 Off-state voltage ratings.
Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For
other gate conditions see the curves of figure 3. It should be noted that VDRM is the repeatable peak
voltage which may be applied to the device and does not relate to a DC operating condition. While not
given in the ratings, VDC should ideally be limited to 65% VDRM in this product.
Diagram 1.
1.2 Reverse voltage rating.
All devices in this series have a minimum VRRM of 18 Volts.
1.3 Peak turn-off current.
The figure given in maximum ratings is the highest value for normal operation of the device under
conditions given in note 2 of ratings. For other combinations of ITGQ, VD and Cs see the curves of figure 8.
The curves are effective over the normal operating range of the device and assume a snubber circuit
equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is
employed then the equivalent CS should be used and Ls<0.3µH must be ensured for the curves to be
applied.
Ls
Ds R
Cs
Diagram 2.
1.4 R.M.S and average current.
Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° half-
sinewave. These are included as a guide to compare the alternative types of GTO thyristors available,
values can not be applied to practical applications, as they do not include switching losses.
1.5 Surge rating and I2t.
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 10.
1.6 Snubber loop inductance.
Use of GTO thyristors with snubber loop inductance, Ls<0.3µH implies no dangerous Vs voltages (see
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively
Vs should be limited to 600 Volts to avoid possible device failure.
Data Sheet. Type G1000L#250 Issue 1
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Anode-Shorted Gate Turn-Off Thyristor type G1000L#250
1.7 Critical rate of rise of on-state current
The value given is the maximum repetitive rating, but does not imply any specific operating condition. The
high turn-on losses associated with limit di/dt would not allow for practical duty cycle at this maximum
condition. For special pulse applications, such as crowbars and pulse power supplies, a much higher di/dt
is possible. Where the device is required to operate with infrequent high current pulses, with natural
commutation (i.e. not gate turn-off), then di/dt>5kA/µs is possible. For this type of operation individual
specific evaluation is required.
1.8 Gate ratings
The absolute conditions above which the gate may be damaged. It is permitted to allow VGK(AV) during turn-
off (see diagram 10) to exceed VRGM which is the implied DC condition.
1.9 Minimum permissible off time.
This time relates specifically to re-firing of device (see also note on gate-off time 2.7). The value given in
the ratings applies only to operating conditions of ratings note 2.
1.10 Minimum permissible on-time.
Figure is given for minimum time to allow complete conduction of all the GTO thyristor islands. Where a
simple snubber, of the form given in diagram 1. (or any other non-energy recovery type which discharges
through the GTO at turn-on) the actual minimum on-time will usually be fixed by the snubber circuit time
constant, which must be allowed to fully discharge before the GTO thyristor is turned off. If the anode
circuit has di/dt<10A/µs then the minimum on-time should be increased, the actual value will depend upon
the di/dt and operating conditions (each case needs to be assessed on an individual basis).
Data Sheet. Type G1000L#250 Issue 1
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February, 2004

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Anode-Shorted Gate Turn-Off Thyristor type G1000L#250
2 Characteristics
2.1 Instantaneous on-state voltage
Measured using a 500µs square pulse, see also the curves of figure 2 for other values of ITM.
2.2 Latching and holding current
These are considered to be approximately equal and only the latching current is measured, type test only
as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is
monitored on an oscilloscope while VD is increased, until the current is seen to flow during the un-gated
period between the end of IG and the application of reverse gate voltage. Test frequency is 100Hz with IGM
& IG as for td of characteristic data.
IG
IGM
100µs
Gate current
100µs
15V
Anode current
R1
Unlatched
unlatched condition
CT
Gate-drive
DUT
C1 Vs
Latched
Anode current
Latched condition
Diagram 4, Latching test circuit and waveforms.
2.3 Critical dv/dt
The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to
dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as
shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is
open circuit or RGK is high impedance. Typical values: - dv/dt<100V/µs for RGK>10.
Diagram 5, Definition of dV/dt.
2.4 Off-state leakage.
For IDRM & IRRM see notes 1.1 & 1.2 for gate leakage IGK, the off-state gate circuit is required to sink this
leakage and still maintain minimum of –2 Volts. See diagram 6.
Data Sheet. Type G1000L#250 Issue 1
Diagram 6.
Page 5 of 13
February, 2004