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M02050-15
3.3/5V Limiting Amplifier for Applications to 2.5 Gbps
The M02050-15 is an integrated high-gain limiting amplifier. The M02050-15 features PECL outputs and is intended
for use in applications to 2.5 Gbps. Full output swing is achieved even at minimum input sensitivity. The M02050-15
can operate with a 3.3V or 5V supply.
Rate select is supported for SFP applications and/or to achieve optimum sensitivity at data rates 1.25 Gbps.
When rate select is high, optimum sensitivity is achieved at 2.5 Gbps.
The M02050-15 also includes two analog RSSI outputs proportional to either the average or peak to peak input sig-
nal and a programmable signal-level detector allowing the user to set thresholds at which the logic outputs are
enabled.
Other available solutions: M02049-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs)
M02040-15 3.3/5V Limiting Amplifier for Applications to 2.125 Gbps (PECL outputs)
M02043-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs)
1.25 Gbps and 4.25 Gbps SFP reference designs available on Mindspeed.com
Applications
• 2.5 Gbps STM-16/OC-48 SDH/SONET
• 1.06, 2.12 and 4.24 Gbps Fibre Channel
• 1.25 Gbps Ethernet
• 1.25 Gbps SDH/SONET
• 2.67 Gbps SDH/SONET with FEC
Features
• Operates with a 3.3V or 5V supply
• 3.5 mV typical input sensitivity at 2.5 Gbps
• PECL outputs
• Rate Selection for 1.25 Gbps operation
• Average Receive power monitor output (RSSIAVG)
• Peak-to-peak Receive power monitor output (RSSIPP)
• On-chip DC offset cancellation circuit
• Low power (< 180 mW at 3.3V)
• Output Jam Function
• 16 pin 3x3 QFN package
Typical Applications Diagram
+3.3 V
Photodiode
RATESELControl RATE SEL
IREF
12.1 kΩ
AC-Coupled
to TIA
DINP
MT02I0A13
VTT
Biasing
Limiting
Amplifier
MON
DINN
Jam
Output
Buffer
RxAVGIN
RSSIAVG
REXT
Level
Shift
Offset cancel
Level
Detect
Comparator
Threshold
Setting
Circuit
Regulator
STSET
RST
VCC3 VCC
optional
PECLP
PECLN
Clock Data
Recovery
Unit
RSSIPP
AC or DC Coupled
(as described in
Applications Information)
LOS
02050-DSH-002-F
Mindspeed Technologies™
Mindspeed Proprietary and Confidential
August 2005

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Ordering Information
Part Number
Package
Operating Temperature
M02050-15 *
M02050-15 in QFN16 package
–40 °C to 85 °C
M02050-15EVM
Evaluation board with M02050-15
–40 °C to 85 °C
* The letter “G” designator after the part number indicates that the device is RoHS-compliant. Refer to www.mindspeed.com for additional
information.
Revision History
Revision
F
Level
Final
E Final
D Preliminary
Date
August 2005
July 2005
April 2005
ASIC
Revision
Description
-15 Correct Jam connection in block diagram and typical applications figures.
Correct IREF figure (reference current generation).
-15 In the DC specifications, update ICC, RINDIFF and RSSIavg; added note 2;
moved RSSIavg from ac specifications. In the ac specifications update
VIN(MIN), VLOS, DJ, RJ and tr/tf; add specifications for LOS assert and
deassert. Updated RST values and the typical LOS curve (Figure 4-3 - Figure 4-
5). Added typical hysteresis curve (Figure 4-6).
-15 Separated the M02049 and M02050 data sheets. New document number for
the M02049 is 02049-15-DSH-002-D.
Update the following DC specifications: ICC, RINDIFF and VOH. Update the
following ac specifications: VIN(MIN), vn, VLOS, HYS, DJ, RJ, tr/tf, TLOS_ON, and
TLOS_OFF. Update RST and RSSI values for this revision of the part.
M02050 Typical Eye Diagram
M02050-15 Pin Configuration
10 mVPP2.d5iffGebrepnstial input
160 mV/div
80 ps/div
GND
VCC
PECLN
PECLP
1
4
16 13
Center Pad
Connect to GND
58
12 RxAvgIN
GND
DINN
9 DINP
02050-DSH-002-F
Mindspeed Technologies™
Mindspeed Proprietary and Confidential
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1.0 Product Specification
1.1 Absolute Maximum Ratings
These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged. Reli-
able operation at these extremes for any length of time is not implied.
NOTE:
The package bottom should be adequately grounded to ensure correct thermal performance,
and it is recommended that vias are inserted through to a lower ground plane.
Table 1-1. Absolute Maximum Ratings
Symbol
Parameter
VCC
TSTG
PECLP, PECLN
Power supply voltage (VCC-GND)
Storage temperature
PECL Output pins voltage
I(PECLP), I(PECLN)
|DINP - DINN|
DINP, DINN
PECL Output pins maximum continuous current (delivered to load)
Data input pins differential voltage
Data input pins voltage meeting |DINP - DINN| requirement
STSET
JAM
Signal detect threshold setting pin voltage
Output enable pin voltage
LOS Status Output pins voltage
Rate_Sel
Rate Select input pin voltage
IREF
I(RSSIAVG)
RSSIPP
I(LOS)
Current into Reference input
Current into RSSIavg input
RSSIPP pin voltage
Current into Loss of Signal pin
Rating
-0.5 to +5.75
-65 to +150
VCC - 2 to VCC + 0.4
30
0.80
GND to VCC3 + 0.4
GND to VCC3 + 0.4
GND to VCC + 0.4
GND to VCC + 0.4
GND to VCC + 0.4
+0 to -120
+0 to -3
GND to VCC3 + 0.4
+3000 to -100
Units
V
°C
V
mA
V
V
V
V
V
V
µA
mA
V
µA
02050-DSH-002-F
Mindspeed Technologies™
Mindspeed Proprietary and Confidential
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