INA-02100.pdf 데이터시트 (총 3 페이지) - 파일 다운로드 INA-02100 데이타시트 다운로드

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Low Noise, Cascadable
Silicon Bipolar MMIC Amplifier
Technical Data
INA-02100
Features
• Cascadable 50 Gain Block
• Low Noise Figure:
2.0 dB Typical at 0.5 GHz
• High Gain:
31.5 dB Typical at 0.5 GHz
25.0 dB Typical at 1.5 GHz
• 3 dB Bandwidth:
DC to 1.0 GHz
• Unconditionally Stable
(k>1)
Description
The INA-02100 is a low-noise silicon
bipolar Monolithic Microwave
Integrated Circuit (MMIC) feedback
amplifier chip. It is designed for
narrow or wide bandwidth indus-
trial and military applications that
require high gain and low noise IF
or RF amplification.
The INA series of MMICs is
fabricated using HP’s 10 GHz fT,
25 GHz fMAX, ISOSAT™-I silicon
bipolar process which uses nitride
self-alignment, submicrometer
lithography, trench isolation, ion
implantation, gold metallization
and polyimide intermetal dielec-
tric and scratch protection to
achieve excellent performance,
uniformity and reliability.
The recommended assembly
procedure is gold-eutectic die
attach at 400°C and either wedge
or ball bonding using 0.7 mil gold
wire.[1]
Chip Outline[1]
RF
OUT
GND
2
GND
1
RF
IN
Notes:
1. See Application Note, “A005:
Transistor Chip Use” for additional
information.
Typical Biasing Configuration
VCC
RFC (Optional)
RF IN
Cblock
4
3
1
2
Rbias
Cblock
Vd = 5.5 V
(Nominal)
RF OUT
5965-9673E
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INA-02100 Absolute Maximum Ratings
Parameter
Device Current
Absolute Maximum[1]
50 mA
Thermal Resistance[2]:
θjc = 60°C/W
Power Dissipation[2,3]
RF Input Power
Junction Temperature
Storage Temperature
400 mW
+13 dBm
200°C
–65 to 200°C
INA-02100 Electrical Specifications[1,3], TA = 25°C
Notes:
1. Permanent damage may occur if
any of these limits are exceeded.
2. TMounting Surface (TMS) = 25°C
3. Derate at 16.7 mW/°C for TMS >
176°C.
Symbol
Parameters and Test Conditions[2]: Id = 35 mA, ZO = 50
Units Min. Typ. Max.
GP Power Gain (|S21| 2)
GP Gain Flatness
f = 0.5 GHz
dB 31.5
f = 0.1 to 1.0 GHz dB ± 1.5
f3 dB
ISO
3 dB Bandwidth
Reverse Isolation (|S12| 2)
f = 0.01 to 1.0 GHz
GHz
dB
1.0
39
VSWR
Input VSWR
Output VSWR
f = 0.01 to 1.0 GHz
f = 0.01 to 1.0 GHz
1.4:1
1.5:1
NF 50 Noise Figure
f = 0.5 GHz
dB 2.0
P1 dB Output Power at 1 dB Gain Compression
f = 0.5 GHz
dBm
11
IP3 Third Order Intercept Point
f = 0.5 GHz
dBm
23
tD Group Delay
f = 0.5 GHz
psec
350
Vd
dV/dT
Device Voltage
Device Voltage Temperature Coefficient
V 4.0
mV/°C
5.5 7.0
+10
Notes:
1. The recommended operating current range for this device is 30 to 40 mA. Typical performance as a function of current
is on the following page.
2. RF performance of the chip is determined by packaging and testing 10 devices per wafer.
3. The values are the achievable performance for the INA-02100 mounted in a 70 mil stripline package.
INA-02100 Typical Scattering Parameters[1] (ZO = 50 , TA = 25°C, Id = 5 mA)
Freq.
GHz
S11
Mag
Ang
S21
dB Mag Ang
S12
dB Mag Ang
S22
Mag Ang
k
0.01 0.06
–4 32.5 42.1 –2 –39.3 .011 14
0.05 0.05
–8 32.5 42.0 –8 –39.4 .011 12
0.10 0.03
–46 32.3 41.3 –16 –37.9 .013 6
0.20 0.02
–52 31.8 39.0 –30 –39.2 .011 –4
0.30 0.01
–46 31.1 36.2 –43 –38.8 .011 –12
0.40 0.02
–44 30.4 33.3 –55 –40.4 .010 –2
0.50 0.03
–35 29.7 30.7 –65 –39.3 .011 –17
0.60 0.06
–29 29.0 28.4 –74 –39.5 .011 –5
0.80 0.10
–41 27.9 24.8 –92 –38.1 .012 –9
1.00 0.17
–60 26.9 22.0 –108 –36.4 .015 –19
1.20 0.24
–73 26.0 19.9 –124 –35.5 .017 –16
1.40 0.30
–89 25.1 18.0 –141 –34.1 .020 –16
1.60 0.37 –103 24.1 16.0 –157 –32.6 .023 –30
1.80 0.42 –116 22.9 14.0 –174 –33.1 .022 –28
2.00 0.46 –128 21.5 12.0 171 –31.4 .027 –31
2.50 0.50 –146 18.3 8.2 142 –29.3 .034 –44
3.00 0.51 –162 14.6 5.4 116 –28.5 .038 –47
.20 –1
.20 1
.20 –1
.21 3
.22 4
.24 2
.26 –1
.28 –4
.32 –14
.34 –26
.36 –40
.38 –60
.32 –91
.26 –111
.22 –122
.19 –148
.15 178
1.27
1.28
1.17
1.33
1.36
1.63
1.56
1.67
1.58
1.41
1.32
1.17
1.19
1.29
1.25
1.34
1.83
Note:
1. S-parameters are de-embedded from 70 mil package measured data using the package model found in the DEVICE
MODELS section of the Communications Components Designer’s Catalog.
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INA-02100 Typical Performance, TA = 25°C
(Unless otherwise noted: The values are the achievable performance for the INA-02100 mounted in a 70 mil
stripline package.)
35
Gain Flat to DC
30
3.5 50
TMS = +125°C
40 TMS = +25°C
3.0 TMS = –55°C
35
0.1 GHz
0.5 GHz
30
1.0 GHz
30
25 2.5
1.5 GHz
25
20
20 2.0
10
20
15
.01 .02
.05 0.1 0.2
1.5
0.5 1.0 2.0
FREQUENCY (GHz)
Figure 1. Typical Gain and Noise Figure
vs. Frequency, TA = 25°C, Id = 35 mA.
0
02 4 6
8
Vd (V)
Figure 2. Device Current vs. Voltage.
15
20
30
40
50
Id (mA)
Figure 3. Power Gain vs. Current.
32
31 Gp
30
29 14
P1 dB
12
3.0 10
2.5
2.0 NF
8
1.0
1.0
–55 –25
+25
+85 +125
TEMPERATURE (°C)
Figure 4. Output Power and 1 dB Gain
Compression, NF and Power Gain vs.
CaseTemperature, f = 0.1 GHz, Id = 35 mA.
15
Id = 40 mA
12
Id = 35 mA
9
Id = 30 mA
6
3
0
.02 .05 0.1 0.2
0.5 1.0 2.0
FREQUENCY (GHz)
Figure 5. Output Power at 1 dB Gain
Compression vs. Frequency.
INA-02100 Chip Dimensions
3.5
3.0
2.5
2.0 Id = 30 to 40 mA
1.5
.02
.05 0.1 0.2
0.5 1.0 2.0
FREQUENCY (GHz)
Figure 6. Noise Figure vs. Frequency.
GND
2
(4)
RF
OUT
(3)
500 ± 13 µm
19.7 ± 0.5 mil
(2)
GND
(1) 1
RF
IN
375 ± 13 µm
14.8 ± 0.5 mil
Chip thickness is 140 µm/5.5 mil. Bond Pads are
41 µm/1.6 mil typical on each side. Note: Ground
Bonding is Critical. Refer to Application Bulletin,
“AB-0007: INA Bonding Configuration”.
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