INA-51063.pdf 데이터시트 (총 5 페이지) - 파일 다운로드 INA-51063 데이타시트 다운로드

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2.4 GHz Low Noise Silicon MMIC
Amplifier
Technical Data
INA-51063
Features
• Ultra-Miniature Package
• Internally Biased, Single 5 V
Supply (12 mA)
• 20.5 dB Gain
• 3 dB NF
• Unconditionally Stable
Applications
• Amplifier for Cellular,
Cordless, Special Mobile
Radio, PCS, ISM, Wireless
LAN, DBS, TVRO, and TV
Tuner Applications
Surface Mount SOT-363
(SC-70) Package
Pin Connections and
Package Marking
GND 1
GND 2
INPUT 3
6 OUTPUT
5 GND
4 VCC
Note: Package marking provides
orientation and identification.
Equivalent Circuit (Simplified)
VCC
RF
INPUT
RF
OUTPUT
Description
Hewlett-Packard’s INA-51063 is a
Silicon monolithic amplifier that
offers excellent gain and noise
figure for applications to 2.4 GHz.
Packaged in an ultra-miniature
SOT-363 package, it requires half
the board space of a SOT-143
package.
The INA-51063 uses a topology
which is internally biased,
eliminating the need for external
components and providing
decreased sensitivity to ground
inductance.
The INA-51063 is fabricated using
HP’s 30 GHz fMAX ISOSATTM
Silicon bipolar process which
uses nitride self-alignment sub-
micrometer lithography, trench
isolation, ion implantation, gold
metallization, and polyimide
intermetal dielectric and scratch
protection to achieve superior
performance, uniformity, and
reliability.
GROUND
6-151
5965-9680E

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Absolute Maximum Ratings
Symbol
VCC
Pin
Tj
TSTG
Parameter
Supply Voltage, to ground
CW RF Input Power
Junction Temperature
Storage Temperature
Units
V
dBm
°C
°C
Absolute
Maximum[1]
12
+13
150
-65 to 150
Thermal Resistance[2]:
θjc = 200°C/W
Notes:
1. Operation of this device above any one
of these limits may cause permanent
damage.
2. TC = 25°C (TC is defined to be the
temperature at the package pins where
contact is made to the circuit board)
INA-51063 Electrical Specifications[3], TC = 25°C, ZO = 50 ,VCC = 5 V
Symbol
Parameters and Test Conditions
Units Min.
Typ. Max.
Gp Power Gain (|S21|2)
NF Noise Figure
f = 1500 MHz
f = 1500 MHz
dB 18
dB
20.5
3
P1dB
IP3
VSWR
Output Power at 1 dB Gain Compression
Third Order Intercept Point
Input VSWR
f = 1500 MHz
f = 1500 MHz
f = 1500 MHz
dBm
dBm
-2.5
+6
1.3
Output VSWR
f = 1500 MHz
1.8
Icc Device Current
ιd Group Delay
f = 1500 MHz
mA
ps
12 14
240
INA-51063 Typical Scattering Parameters[3], TC = 25°C, ZO = 50 ,VCC = 5.0 V
Freq.
GHz
S11
Mag Ang
dB
S21
Mag
Ang dB
S12
Mag Ang
S22
Mag Ang
0.05 0.17 177 20.8 10.94 -4 -30.9 0.029 -1
0.23 -5
0.10 0.17 175 20.8 10.95 -7 -30.8 0.029 -2
0.23 -8
0.20 0.16 170 20.8 10.94 -14 -30.9 0.028 -4
0.23 -16
0.30 0.16 166 20.7 10.89 -21 -31.0 0.028 -5
0.23 -25
0.40 0.14 162 20.8 10.94 -28 -31.2 0.028 -7
0.24 -33
0.50 0.13 159 20.8 10.96 -35 -31.3 0.027 -9
0.24 -43
0.60 0.12 158 20.8 11.00 -42 -31.5 0.027 -10 0.24 -52
0.70 0.10 158 20.9 11.06 -49 -31.6 0.026 -12 0.24 -61
0.80 0.08 164 20.9 11.06 -57 -31.9 0.026 -14 0.25 -69
0.90 0.07 172 20.9 11.10 -64 -32.1 0.025 -15 0.26 -77
1.00 0.07 -174 20.9 11.10 -72 -32.5 0.024 -17 0.26 -85
1.10 0.07 -156 20.9 11.14 -80 -32.7 0.023 -18 0.27 -94
1.20 0.08 -142 20.9 11.11 -88 -33.2 0.022 -21 0.27 -103
1.30 0.10 -135 20.9 11.08 -96 -33.5 0.021 -23 0.28 -113
1.40 0.12 -131 20.8 11.01 -105 -33.9 0.020 -25 0.28 -122
1.50 0.14 -131 20.7 10.88 -113 -34.6 0.019 -28 0.28 -131
1.60 0.17 -132 20.6 10.71 -122 -35.2 0.017 -30 0.28 -140
1.70 0.19 -134 20.4 10.45 -131 -36.0 0.016 -33 0.28 -150
1.80 0.22 -135 20.1 10.16 -139 -36.8 0.014 -36 0.27 -159
1.90 0.24 -139 19.8 9.78 -148 -37.8 0.013 -39 0.27 -168
2.00 0.26 -142 19.4 9.37 -157 -39.1 0.011 -42 0.25 -177
2.10 0.28 -145 19.0 8.90 -165 -40.6 0.009 -47 0.24 175
2.20 0.30 -148 18.5 8.42 -174 -42.2 0.008 -53 0.22 166
2.30 0.32 -151 18.0 7.96 179 -44.3 0.006 -63 0.21 158
2.40 0.33 -154 17.4 7.45 171 -46.7 0.005 -79 0.20 150
2.50 0.35 -157 16.9 6.98 164 -48.9 0.004 -108 0.18 143
3.00 0.41 -169 13.8 4.89 133 -39.0 0.011 163 0.10 115
3.50 0.45 -179 10.8 3.48 108 -31.9 0.025 146 0.03 123
4.00 0.50 172 8.3 2.59 88 -26.9 0.045 132 0.05 -132
Note:
3. Reference plane per Figure 9 in Applications Information section.
6-152
K
Factor
1.65
1.65
1.70
1.70
1.69
1.74
1.74
1.79
1.78
1.83
1.89
1.95
2.02
2.10
2.19
2.31
2.57
2.77
3.20
3.53
4.32
5.49
6.49
9.03
11.51
15.20
7.64
4.61
3.29

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INA-51063 Typical Performance, TC = 25°C, ZO = 50 , VCC = 5 V
24
5.5 V
22
20 5.0 V
18 4.5 V
16
14
12
10
0.05 0.45 0.85 1.25 1.65 2.05 2.45
FREQUENCY (GHz)
5.0
4.5
4.0
5.0 V
3.5
4.5 V
3.0
5.5 V
2.5
2.0
1.5
1.0
0.1
0.5 0.9 1.3 1.7 2.1
FREQUENCY (GHz)
2.5
4
5.5 V
2
5.0 V
0
-2 4.5 V
-4
-6
-8
-10
0.1
0.9 1.5 2.1
FREQUENCY (GHz)
2.7
Figure 1. Gain vs. Frequency and
Voltage.
24
22
20 +25 °C
18 -40 °C
+85 °C
16
14
12
10
0.1
0.6 1.2 1.8 2.4
FREQUENCY (GHz)
3.0
Figure 2. Noise Figure vs. Frequency
and Voltage.
5.0
4.5
4.0
3.5
+85 °C
3.0
+25 °C
2.5
2.0 -40 °C
1.5
1.0
0.1 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
FREQUENCY (GHz)
Figure 3. Output Power for 1 dB Gain
Compression vs. Frequency and
Voltage.
6
-40 °C
4
2
0
+25 °C
-2
-4
-6
-8
-10
0.1
+85 °C
0.6 1.2 1.8 2.4
FREQUENCY (GHz)
Figure 4. Gain vs. Frequency and
Temperature.
Figure 5. Noise Figure vs. Frequency
and Temperature.
Figure 6. Output Power for 1 dB Gain
Compression vs. Frequency and
Temperature.
2.2
2.0
1.8 VSWR OUT
1.6
1.4
VSWR IN
1.2
1.0
0.05 0.45 0.85 1.25 1.65 2.05 2.45
FREQUENCY (GHz)
25
20
+85 °C
15
+25 °C
10
-40 °C
5
0
01 234 5 6 7
VCC (V)
Figure 7. Input and Output VSWR vs.
Frequency.
Figure 8. Supply Current vs. Voltage
and Temperature.
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INA-51063 Applications
Information
Introduction
The INA-51063 is a silicon RFIC
amplifier with a 50 input and
output. The INA-51063 is easy to
use for low noise and multi-
purpose gain block applications
up to 2.4 GHz.
Phase Reference Planes
The positions of the reference
planes used to measure
S-Parameters are shown in
Figure 9. As seen in the
illustration, the reference planes
are located at the point where the
package leads contact the test
circuit.
Biasing
The INA-51063 is a voltage biased
device and operates from a single
+5 volt power supply with a
typical current drain of only
12␣ mA. All bias regulation
circuitry is integrated into the
RFIC. The supply voltage for the
INA-51063 is fed in through the
separate VCC pin of the device and
does not require RF isolation
from the input or output. No
additional external DC compo-
nents are needed.
REFERENCE
PLANES
Operating Details
The INA-51063 is very easy to use.
The basic application of the INA-
51063 is shown in Figure 10.
DC blocking capacitors are
placed in series with the RF Input
and RF Output to isolate adjacent
stages from the internal bias
voltages that are present at these
terminals. The values of the
blocking capacitors are deter-
mined by the lowest operating
frequency. The values for the
blocking capacitors are chosen
such that their reactances are
small relative to 50 . As an
example, use of the INA-51063 for
a 2.4 GHz application would
require blocking capacitors of at
least 33 pF.
The VCC connection to the ampli-
fier must be RF bypassed by
placing a capacitor to ground
directly at the bias pin of the
package. Like the DC blocking
capacitors, the value of the VCC
bypass capacitor is determined by
the lowest operating frequency
for the amplifier. This value may
typically be the same as that of
the DC blocking capacitors. If
long bias lines are used to
connect the amplifier to the VCC
supply, additional bypass capaci-
tors may be needed to prevent
resonances that would otherwise
result in undesirable gain
responses. A well-bypassed VCC
line is also desirable to prevent
possible oscillations that may
occur due to feedback through
the bias line from other stages in
a cascade.
SOT-363 PCB Layout
The INA-51063 is packaged in the
miniature SOT-363 (SC-70)
surface mount package. A PCB
pad layout for the SOT-363
package is shown in Figure 11
(dimensions are in inches). This
layout provides ample allowance
for package placement by auto-
mated assembly equipment
without adding parasitics that
could impair the high frequency
RF performance of the
INA-51063. The layout is shown
0.026
0.035
0.07
0.016
Figure 11. PCB Pad Layout
(Dimensions in Inches).
TEST CIRCUIT
Figure 9. Reference Planes.
Cblock
RF
OUTPUT
RF
INPUT Cblock
Cbypass
VCC
Figure 10. Basic Amplifier
Application.
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with a nominal SOT-363 package
footprint superimposed on the
PCB pads.
RF Layout
The RF layout in Figure 12 is
suggested as a starting point for
designs using the INA-51063
amplifier. Adequate grounding is
needed to obtain maximum
performance and to reduce the
possibility of potential instability.
All three ground pins of the RFIC
should be connected to RF
C VCC
ground by using plated through
holes (vias) near the package
terminals. The power supply
connection to the amplifier must
be RF bypassed by placing a
capacitor directly to ground at
the VCC pin of the package.
It is recommended that the PCB
traces for the ground pins NOT be
connected together underneath
the body of the package. PCB
pads hidden under the package
cannot be adequately inspected
for SMT solder quality.
FR-4 or G-10 PCB material is a
good choice for most low cost
wireless applications. Typical
board thickness is 0.025 or
0.031␣ inches. The width of 50
microstriplines in these PCB
thicknesses is also convenient for
mounting chip components such
as the series inductor at the input
for impedance matching or for
DC blocking capacitors. For noise
figure sensitive applications, the
use of PTFE/glass dielectric
materials may be warranted to
minimize transmission line losses
at the amplifier input.
RF OUTPUT
50
51
Figure 12. RF Layout.
50
RF INPUT
INA-51063 Part Number Ordering Information
Part Number Devices per Container
Container
INA-51063-TR1
3,000
7" reel
INA-51063-BLK
100
Antistatic bag
Package Dimensions
Outline 63 (SOT-363/SC-70)
1.30 (0.051)
REF.
2.20 (0.087)
2.00 (0.079)
1.35 (0.053)
1.15 (0.045)
0.10 (0.004)
0.00 (0.00)
2.20 (0.087)
1.80 (0.071)
0.650 BSC (0.025)
0.30 REF.
0.425 (0.017)
TYP.
0.25 (0.010)
0.15 (0.006)
1.00 (0.039)
0.80 (0.031)
0.20 (0.008)
10° 0.30 (0.012) 0.10 (0.004)
0.10 (0.004)
DIMENSIONS ARE IN MILLIMETERS (INCHES)
6-155