INA-52063.pdf 데이터시트 (총 7 페이지) - 파일 다운로드 INA-52063 데이타시트 다운로드

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1.5 GHz Low Noise Silicon
MMIC Amplifier
Technical Data
INA-52063
Features
• Ultra-Miniature Package
• Single 5 V Supply (30 mA)
• 22 dB Gain
• 8 dBm P1dB
• Unconditionally Stable
Applications
• Amplifier for Cellular,
Cordless, Special Mobile
Radio, PCS, ISM, Wireless
LAN, DBS, TVRO, and TV
Tuner Applications
Equivalent Circuit
(Simplified)
VCC
Surface Mount SOT-363
(SC-70) Package
Pin Connections and
Package Marking
GND 2
GND 1
INPUT 3
6
OUTPUT
and VCC
5 GND 3
4 VCC
Note: Package marking provides
orientation and identification.
Description
Hewlett-Packard’s INA-52063 is a
Silicon monolithic amplifier that
offers excellent gain and power
output for applications to
1.5 GHz. Packaged in an ultra-
miniature SOT-363 package, it
requires half the board space of a
SOT-143 package.
The INA-52063 is fabricated using
HP’s 30 GHz fMAX ISOSATTM
Silicon bipolar process which
uses nitride self-alignment sub-
micrometer lithography, trench
isolation, ion implantation, gold
metallization, and polyimide
intermetal dielectric and scratch
protection to achieve superior
performance, uniformity, and
reliability.
RF
OUTPUT
& VCC
RF
INPUT
GROUND 2
5965-9681E
GROUND 1
GROUND 3
6-156

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Absolute Maximum Ratings
Symbol
VCC
Pin
Tj
TSTG
Parameter
Supply Voltage, to Ground
CW RF Input Power
Junction Temperature
Storage Temperature
Units
V
dBm
°C
°C
Absolute
Maximum[1]
12
+13
150
-65 to 150
Thermal Resistance[2]:
θj-c = 170°C/W
Notes:
1. Operation of this device above any one
of these limits may cause permanent
damage.
2. TC = 25°C (TC is defined to be the
temperature at the package pins where
contact is made to the circuit board)
INA-52063 Electrical Specifications, TC = 25°C, ZO = 50 , VCC = 5 V, unless noted
Symbol Parameters and Test Conditions
Units Min. Typ.
Gp Power Gain (|S21|2)
NF Noise Figure
f = 900 MHz
f = 900 MHz
dB
dB
20 22
4.0
P1dB
IP3
IP3
VSWR
Output Power at 1 dB Gain Compression
Third Order Intercept Point
Third Order Intercept Point
Input VSWR
f = 900 MHz
f = 900 MHz
f = 2100 MHz
f = 900 MHz
dBm
dBm
dBm
+8
+20
+15
1.4
Output VSWR
f = 900 MHz
1.3
ICC Device Current
ιd Group Delay
f = 900 MHz
mA
ps
30
238
Max.
38
6-157

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INA-52063 Typical Performance, TC = 25°C, ZO = 50 , VCC = 5 V, unless noted
24.0
23.0
22.0
21.0
20.0
19.0
18.0
17.0
16.0
15.0
0.05
5.5 V
5.0 V
4.5 V
0.65 1.25 1.85
FREQUENCY (GHz)
2.45
6.0
5.5 V
5.5 5.0 V
4.5 V
5.0
4.5
4.0
3.5
0.09 0.2 0.5 0.8 1.1 1.4 1.7 2.0 2.3 2.6
FREQUENCY (GHz)
12.0
11.0
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
0.05
5.5 V
5.0 V
4.5 V
0.30 0.60 1.20 1.80
FREQUENCY (GHz)
2.40
Figure 1. Gain vs. Frequency and
Voltage.
Figure 2. Noise Figure vs. Frequency
and Voltage.
Figure 3. Output Power for 1 dB Gain
Compression vs. Frequency and
Voltage.
24.0
23.0
22.0
21.0
20.0
19.0
18.0
17.0
16.0
15.0
0.05
-40 °C
+25 °C
+85 °C
0.60
1.20 1.80
FREQUENCY (GHz)
2.40
7.0
-40 °C
6.5 +25 °C
+85 °C
6.0
5.5
5.0
4.5
4.0
3.5
3.0
0.05 0.40 0.80 1.20 1.60 2.00 2.40
FREQUENCY (GHz)
12
-40 °C
11 +25 °C
+85 °C
10
9
8
7
6
5
4
0.05 0.30 0.60 1.20 1.80 2.40
FREQUENCY (GHz)
Figure 4. Gain vs. Frequency and
Temperature.
2.2
2.0
VSWR IN
VSWR OUT
1.8
1.6
1.4
1.2
1.0
0.0 0.4 0.7 1.1 1.4 1.8 2.1 2.5
50 505 0 50
FREQUENCY (GHz)
Figure 7. Input and Output VSWR vs.
Frequency.
Figure 5. Noise Figure vs. Frequency
and Temperature.
60
-40 °C
50 +25 °C
+85 °C
40
30
20
10
0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0
VCC (V)
Figure 8. Supply Current vs. Voltage
and Temperature.
Figure 6. Output Power for 1 dB Gain
Compression vs. Frequency and
Temperature.
6-158

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INA-52063 Typical Scattering Parameters[3], TC = 25°C, ZO = 50 , VCC = 5.0 V
Freq.
S11
GHz Mag Ang
dB
S21
Mag
Ang
dB
S12
Mag
S22
Ang Mag Ang
0.05 0.06 165 23.5 14.88 -5 -29.3 0.034
0.10 0.06 154 23.4 14.84 -9 -29.3 0.034
0.20 0.06 131 23.4 14.72 -19 -29.4 0.034
0.30 0.07 104 23.3 14.57 -28 -29.5 0.034
0.40 0.07 80 23.1 14.33 -37 -29.4 0.034
0.50 0.09 66 23.0 14.08 -46 -29.4 0.034
0.60 0.10 46 22.8 13.76 -55 -29.4 0.034
0.70 0.12 30 22.6 13.41 -64 -29.3 0.034
0.80 0.13 14 22.3 13.01 -73 -29.2 0.035
0.90 0.15 0 22.0 12.59 -82 -29.0 0.036
1.00 0.17 -12 21.7 12.14 -90 -28.8 0.036
1.20 0.21 -33 21.0 11.22 -106 -28.4 0.038
1.40 0.24 -50 20.2 10.28 -122 -28.1 0.040
1.60 0.27 -66 19.4 9.38 -137 -27.7 0.041
1.80 0.30 -80 18.6 8.55 -151 -27.5 0.042
2.00 0.32 -93 17.8 7.80 -164 -27.4 0.043
2.20 0.33 -105 17.1 7.13 -177 -27.6 0.042
2.40 0.35 -117 16.3 6.52 170 -27.8 0.041
2.60 0.36 -128 15.5 5.98 159 -28.1 0.039
2.80 0.36 -139 14.8 5.52 147 -28.9 0.036
3.00 0.36 -149 14.1 5.08 136 -29.5 0.033
0 0.05
1
0 0.05
0
0 0.05
-1
1 0.06
-5
2 0.07 -10
3 0.08 -14
4 0.09 -21
5 0.11 -29
6 0.13 -37
6 0.14 -45
7 0.16 -52
7 0.20 -67
6 0.23 -81
4 0.25 -94
2 0.27 -107
-1 0.29 -118
-5 0.30 -129
-8 0.31 -139
-12 0.32 -149
-15 0.33 -158
-16 0.33 -168
Note: 3. Reference plane per Figure 9 in Applications Information section.
K
Factor
1.24
1.24
1.25
1.25
1.26
1.27
1.28
1.29
1.28
1.27
1.28
1.25
1.24
1.26
1.29
1.33
1.44
1.56
1.74
2.01
2.37
INA-52063 Applications
Information
Introduction
The INA-52063 is a silicon RFIC
amplifier that is designed with an
internal resistive feedback net-
work to provide a 50 input and
50 output impedance. With a
Third Order Intercept Point of
+20 dBm and a low Noise Figure
of 4 dB, the INA-52063 is
especially useful for RF and IF
amplifier applications requiring
high dynamic ranges.
Phase Reference Planes
The positions of the reference
planes used to measure
S-Parameters for this device are
shown in Figure 9. As seen in the
illustration, the reference planes
are located at the point where the
package leads contact the test
circuit.
SOT-363 PCB Layout
The INA-52063 is packaged in the
miniature SOT-363 (SC-70)
surface mount package. A PCB
pad layout for the SOT-363
package is shown in Figure 10
(dimensions are in inches). This
layout provides ample allowance
for package placement by
automated assembly equipment
without adding pad parasitics that
REFERENCE
PLANES
TEST CIRCUIT
Figure 9. Phase Reference Planes.
6-159
could impair the high frequency
performance of the INA-52063.
The layout is shown with a
nominal SOT-363 package
footprint superimposed on the
PCB pads for reference.
0.026
0.035
0.07
0.016
Figure 10. PCB Pad Layout
(dimensions in inches).

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Operating Details
The INA-52063 is a voltage biased
device that operates from a
+5␣ volt power supply with a
typical current drain of 30 mA.
All bias regulation circuitry is
integrated into the RFIC.
Figure 11 shows a typical imple-
mentation of the INA-52063. The
supply voltage for the INA-52063
must be applied to two terminals,
the VCC pin and the RF Output pin.
The VCC connection to the ampli-
fier is RF bypassed by placing a
capacitor to ground near the VCC
pin of the amplifier package.
The power supply connection to
the RF Output pin is achieved by
means of a RF choke (inductor).
The value of the RF choke must
be large relative to 50 in order
to prevent loading of the RF
Output.
The supply voltage end of the RF
choke is bypassed to ground with
a capacitor. If the physical layout
permits, this can be the same
bypass capacitor that is used at
the VCC terminal of the amplifier.
Blocking capacitors are normally
placed in series with the RF Input
and the RF Output to isolate the
DC voltages on these pins from
circuits adjacent to the amplifier.
The values for the blocking and
bypass capacitors are selected to
provide a reactance at the lowest
frequency of operation that is
small relative to 50 .
RF Layout
An example layout for an
amplifier using the INA-52063 is
shown in Figure 12.
This example uses a microstrip-
line design (solid groundplane on
the back side of the circuit board).
The circuit board material is
0.031-inch thick FR-4. Plated
through holes (vias) are used to
bring the ground to the top side
of the circuit where needed.
Multiple vias are used to reduce
the inductance of the path to
ground.
Figure 13 shows an assembled
amplifier. The +5 volt supply is
fed directly into the VCC pin of
the INA-52063 and into the RF
Output pin through the RF choke
(RFC). Capacitor C3 provides RF
bypassing for both the VCC pin
and the power supply end of the
RFC.
Capacitor C4 is optional and may
be used to add additional bypass-
ing for the VCC line. A well
bypassed VCC line is especially
necessary in cascades of ampli-
fier stages to prevent oscillation
that may occur as a result of RF
H
05/95
INA-5XX63 DEMO BOARD
RF
INPUT Cblock
Cblock
RF
OUTPUT
RFC
VCC
Cbypass
INPUT
OUTPUT
VCC
Figure 11. Basic Amplifier
Application.
Figure 12. RF Layout.
6-160
feedback through the power
supply lines.
For this demonstration circuit,
the value chosen for the RF
choke was 220 nH (Coilcraft
1008CS-221 or equivalent). All of
the blocking and bypass capac-
itors are 1000 pF. These values
provide excellent amplifier
performance from under 50 MHz
through 1 GHz. Larger values for
the choke and capacitors can be
used to extend the lower end of
the bandwidth. Since the gain of
the INA-52063 extends down to
DC, the frequency response of the
amplifier is limited only by the
values of the capacitors and
choke.
A convenient method for making
RF connection to the demonstra-
tion board is to use a PCB
mounting type of SMA connector
(Johanson 142-0701-881, or
equivalent). These connectors
can be slipped over the edge of
the PCB and the center conduc-
tors soldered to the input and
output lines. The ground pins of
the connectors are soldered to
the ground plane on the backside
of the board. The extra ground
pins for the top of the board are
not needed and are clipped off.
PCB Materials
Typical choices for PCB material
for low cost wireless applications
are FR-4 or G-10 with a thickness
of 0.025 or 0.031 inches. A thick-
ness of 0.062 inches is the maxi-
mum that is recommended for
use with this particular device.
The use of a thicker board mate-
rial increases the inductance of
the plated through vias used for
RF grounding and may deterior-
ate circuit performance. Adequate
grounding is needed not only to
obtain maximum amplifier
performance but also to reduce
any possibility of instability.