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Data Sheet
January 1999
Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Features
s Pin-equivalent to the general-trade 26LS31 device,
with improved speed, reduced power consumption,
and significantly lower levels of EMI
s Four line drivers per package
s Meets ESDI standards
s 2.0 ns maximum propagation delay
s Single 5.0 V ± 10% supply
s Operating temperature range: 40 °C to +125 °C
(wider than the 41 Series)
s 400 Mbits/s maximum data rate
s Logic to convert TTL input logic levels to differen-
tial, pseudo-ECL output logic levels
s No line loading when VCC = 0 (BDG1A, BDP1A
only)
s High output driver for 50 loads
s <0.2 ns output skew (typical)
s On-chip 220 loads available
s Third-state outputs available
s Surge-protection to ±60 V for 10 ms available
(BPNGA, BPNPA, BPPGA)
s Available in four package types
s ESD performance better than the 41 Series
s Lower power requirement than the 41 Series
Description
These quad differential drivers are TTL input-to-
pseudo-ECL-differential-output used for digital data
transmission over balanced transmission lines. All
devices in this family have four drivers with a single
enable control in a common package. These drivers
are compatible with many receivers, including the
Lucent Technologies Microelectronics Group 41
Series receivers and transceivers. They are pin
equivalent to the general-trade 26LS31, but offer
increased speed, decreased power consumption,
and significantly lower levels of electromagnetic inter-
ference (EMI). They replace the Lucent 41 Series
drivers.
The BDG1A device is the generic driver in this family
and requires the user to supply external resistors on
the circuit board for impedance matching.
The BDGLA is a low-power version of the BDG1A,
reducing the power requirement by more than one
half. The BDGLA features a 3-state output with a typ-
ical third-state level of 0.2 V.
The BDP1A is equivalent to the BDG1A but has
220 termination resistors to ground on each driver
output. This eliminates the need for external pull-
down resistors when driving a 100 impedance line.
The BPNGA and BPNPA are equivalent to the
BDG1A and BDP1A, respectively, except that a light-
ning protection circuit has been added to the driver
outputs. This circuit will absorb large transitions on
the transmission lines without destroying the device.
The BPPGA combines the features of the BPNGA
and BPNPA. Two of the gates have their outputs ter-
minated to ground through 220 resistors while the
two remaining gates require external termination
resistors.
When the BDG1A and the BDP1A devices are pow-
ered down, the output circuit appears as an open cir-
cuit relative to the power supplies; hence, they will
not load the transmission line. For those circuits with
termination resistors, the line will remain impedance
matched when the circuit is powered down. The
BPNGA, BPNPA, BPPGA, and BDGLA will load the
transmission line, because of the protection circuit,
when the circuit is powered down.
The packaging options that are available for these
quad differential line drivers include a 16-pin DIP; a
16-pin, J-lead SOJ; a 16-pin, gull-wing SOIC; and a
16-pin, narrow-body, gull-wing SOIC.

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Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Pin Information
Data Sheet
January 1999
AI 1
AO 2
AO 3
E1 4
BO 5
BO 6
BI 7
GND 8
A
D
B
C
BDG1A
BDGLA
BPNGA
16 VCC
15 DI
14 DO
13 DO
12 E2
11 CO
10 CO
9 CI
AI 1
AO 2
AO 3
E1 4
BO 5
BO 6
BI 7
GND 8
A
D
B
C
BDP1A
BPNPA
16 VCC
15 DI
14 DO
13 DO
12 E2
11 CO
10 CO
9 CI
AI 1
AO 2
AO 3
E1 4
BO 5
BO 6
BI 7
GND 8
Figure 1. Quad Differential Driver Logic Diagrams
A
D
B
C
BPPGA
16 VCC
15 DI
14 DO
13 DO
12 E2
11 CO
10 CO
9 CI
12-2038b (F)
Table 1. Enable Truth Table
E1 E2
00
10
01
11
Condition
Active
Active
Disabled
Active
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
Parameter
Power Supply Voltage
Ambient Operating Temperature
Storage Temperature
Symbol
VCC
TA
Tstg
Min
40
55
Max
6.5
125
150
Unit
V
°C
°C
2 Lucent Technologies Inc.

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Data Sheet
January 1999
Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Electrical Characteristics
For electrical characteristics over the entire temperature range, see Figures 7 through 9.
Table 2. Power Supply Current Characteristics
TA = –40 °C to +125 °C, VCC = 5 V ± 0.5 V.
Parameter
Symbol
Min
Typ
Max
Unit
Power Supply Current (VCC = 5.5 V):
All Outputs Disabled:
BDG1A*, BPNGA*
BDP1A, BPNPA
BDGLA*
BPPGA*
All Outputs Enabled:
BDG1A*, BPNGA*
BDP1A, BPNPA
BDGLA*
BPPGA*
ICC
ICC
ICC
ICC
ICC
ICC
ICC
ICC
45 65 mA
120 160 mA
35 55 mA
85 115 mA
25 40 mA
150 200 mA
14 20 mA
90 115 mA
* Measured with no load (BPPGA has no load on drivers C and D).
† The additional power dissipation is the result of integrating the termination resistors into the device. ICC is measured with a 100 resistor
across the driver outputs (BPPGA has terminating resistors on drivers A and B).
Third State
These drivers produce pseudo-ECL levels, and the third-state mode is different than the conventional TTL devices.
When a driver is placed in the third state, the bases of the output transistors are pulled low, bringing the outputs
below the active-low levels. This voltage is typically 2 V for most drivers. In the bidirectional bus application, the
driver of one device, which is in its third state, may be back driven by another driver on the bus whose voltage in the
low state is lower than the third-stated device. This could come about due to differences in the drivers’ independent
power supplies. In this case, the device in the third state will control the line, thus clamping the line and reducing
the signal swing. If the difference voltage between the independent power supplies and the drivers is small, then
this consideration can be ignored. In the typical case, the difference voltage can be as much as 1 V without signifi-
cantly affecting the amplitude of the driving signal.
Lucent Technologies Inc.
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Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Data Sheet
January 1999
Electrical Characteristics (continued)
Table 3. Voltage and Current Characteristics
For the variation in VOH and VOL over the temperature range, see Figures 7 and 8.
TA = –40 °C to +125 °C.*
Parameter
Output Voltages:
Low*
High*:
BDG1A, BDP1A, BPNGA, BPNPA, BPPGA
BDGLA
Differential Voltage (VOH – VOL)
Output Voltages (TA = 0 °C to 85 °C):
Low*
High*:
BDG1A, BDP1A, BPNGA, BPNPA, BPPGA
BDGLA
Differential Voltage (VOH – VOL)
Third State, IOH = –1.0 mA, VCC = 4.5 V:
BDG1A, BDP1A, BPNGA, BPNPA, BPPGA
BDGLA
Input Voltages:
Low, VCC = 5.5 V:
Data Input
Enable Input
High, VCC = 4.5 V
Clamp, VCC = 4.5 V, II = –5.0 mA
Short-circuit Output Current, VCC = 5.5 V
Input Currents, VCC = 5.5 V:
Low, VI = 0.4 V
High, VI = 2.7 V
Reverse, VI = 5.5 V
Output Resistors:
BDP1A, BPNPA, BPPGA§
Symbol
VOL
VOH
VOH
VDIFF
VOL
VOH
VOH
VDIFF
VOZ
VOZ
VIL
VIL
VIH
VIK
IOS
IIL
IIH
IIH
RO
Min
VOH – 1.4
VCC 1.8
VCC 2.5
0.65
VOH – 1.4
VCC 1.5
VCC 2.5
0.8
2.0
–100
Typ
VOH 1.1
VCC 1
VCC 2
1.1
VOH 1.1
VCC 1
VCC 2
1.1
VOL 0.5
0.2
Max
VOH 0.65
VCC 0.8
VCC 1.6
1.4
VOH 0.8
VCC 0.8
VCC 1.6
1.4
VOL 0.2
0.5
— 0.8
— 0.7
——
1.0
——
400
— 20
— 100
220 —
* Values are with terminations as per Figure 4 or equivalent.
† The input levels and difference voltage provide zero noise immunity and should be tested only in a static, noise-free environment.
‡ Test must be performed one lead at a time to prevent damage to the device.
§ See Figure 1 for BPPGA terminations.
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
µA
µA
µA
4 Lucent Technologies Inc.

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Data Sheet
January 1999
Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Timing Characteristics
Table 4. Timing Characteristics (See Figures 2 and 3.)
For tP1 and tP2 propagation delays over the temperature range, see Figure 9.
Propagation delay test circuit connected to output (see Figure 6).
TA = –40 °C to +125 °C, VCC = 5 V ± 0.5 V.
Parameter
Symbol
Min
Typ
Max
Propagation Delay:
Input High to Output
Input Low to Output
Capacitive Delay
Disable Time (either E1 or E2):
High-to-high Impedance
Low-to-high Impedance
Enable Time (either E1 or E2):
High Impedance to High
High Impedance to Low
Output Skew, |tP1 – tP2|
|tPHH – tPHL|, |tPLH – tPLL|
Difference Between Drivers
Rise Time (20%—80%)
Fall Time (80%—20%)
tP1*
tP2*
tp
tPHZ
tPLZ
tPZH
tPZL
tskew1
tskew2
tskew
ttLH
ttHL
0.8
0.8
4
4
4
4
1.2
1.2
0.02
8
8
8
8
0.1
0.2
0.7
0.7
2.0
2.0
0.03
12
12
12
12
0.3
0.5
0.3
2
2
* tP1 and tP2 are measured from the 1.5 V point of the input to the crossover point of the outputs (see Figure 2).
† CL = 5 pF. Capacitor is connected from each output to ground.
Unit
ns
ns
ns/pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
Lucent Technologies Inc.
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