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Chip Integration Technology Corporation
T0501MA
Low Capacitance ESD Protection Device
Features
Applications
Transient protection for high-speed data lines
IEC 61000-4-2 (ESD) ±30kV (Air)
±30kV (Contact)
IEC 61000-4-4 (EFT) 40A (5/50 ns)
Cable Discharge Event (CDE)
Package optimized for high-speed lines
Ultra-small package (0.6mmx0.3mmx0.3mm)
Protects one data, control or power line
Low capacitance: 12pF (Typical)
Low leakage current: 0.1u A @VRWM (Typical)
Low clamping voltage
Each I/O pin can withstand over 1000 ESD
strikes for ±8kV contact discharge
Description
T0501MA is a low-capacitance Transient Voltage
Suppressor (TVS) designed to provide electrostatic
discharge (ESD) protection for high-speed data
interfaces. With typical capacitance of 12pF only,
T0501MA is designed to protect parasitic-sensitive
systems against over-voltage and over-current transient
events. It complies with IEC 61000-4-2 (ESD),
Level 4 (±15kV air, ±8kV contact discharge),
IEC 61000-4-4 (electrical fast transient - EFT) (40A,5/
50 ns), very fast charged device model (CDM) ESD
and cable discharge event (CDE), etc.
Portable Electronics
Desktops, Servers and Notebooks
Cellular Phones
MP3 Ports
Digital Camera Ports
Mechanical Characteristics
DFN0603-2L package
Flammability Rating: UL 94V-0
Packaging: Tape and Reel
Circuit Diagram
I/O_1
I/O_2
Pin Configuration
T0501MA uses ultra-small DFN0603 package. Each
T0501MA device can protect one data line . It offers
system designers flexibility to protect single data line
where space is a premium concern.
DFN0603
(Top View)
Document ID : DS-22V01
1
Revised Date : 2016/08/29
Revision : C

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Chip Integration Technology Corporation
T0501MA
Low Capacitance ESD Protection Device
Absolute Maximum Rating
Symbol
VESD
TOPT
TSTG
Parameter
ESD per IEC 61000-4-2 (Air)
ESD per IEC 61000-4-2 (Contact)
Operating Temperature
Storage Temperature
Electrical Characteristics (T = 25 oC)
Symbol
Parameter
VRWM Nominal Reverse Working Voltage
IR Reverse Leakage Current @ VRWM
VBR Reverse Breakdown Voltage @ IT
IT Test Current for Reverse Breakdown
VC Clamping Voltage @ IPP
IPP Maximum Peak Pulse Current
CESD Parasitic Capacitance
VR Reverse Voltage
f Small Signal Frequency
Value
±30
±30
-55/+125
-55/+150
Units
kV
oC
oC
I
IPP
VC VBR VRWM
IIRT
IR
IT
VRWM VBR VC V
IPP
Bi-Directional TVS
Symbol
VRWM
IR
VBR
VC
VC
CESD
Test Condition
VRWM = 5V, T = 25oC
Between I/O_1 and I/O_2
IT = 1mA
Between I/O_1 and I/O_2
IPP = 1A, tp = 8/20μs
Between I/O_1 and I/O_2
IPP = 4A, tp = 8/20μs
Between I/O_1 and I/O_2
VR = 0V, f = 1MHz
Between I/O_1 and I/O_2
Minimum Typical Maximum Units
5.0 V
0.1 1.0 μA
5.5 6.0 8.0 V
10 V
15 V
10 12
15 pF
Document ID : DS-22V01
2
Revised Date : 2016/08/29
Revision : C

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Chip Integration Technology Corporation
T0501MA
Low Capacitance ESD Protection Device
TLP Measurement of I/O_1 to I/O_2 Voltage Sweeping of I/O_1 to I/O_2
10
9
8
7
6
5
4
3
2
1
0
0 2 4 6 8 10 12 14 16
TLP Voltage (V)
0.12
0.10
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
-0.12
-8 -6 -4 -2
0
2
4
6
8
Voltage (V)
Capacitance vs. Voltage of I/O_1 to I/O_2 (f = 1MHz)
Capacitance vs. Reverse Voltage
Normalized Capacitance vs. Reverse Voltage
20.0
18.0
16.0
14.0
12.0
10.0
8.0
6.0
4.0
0
1234
Reverse Voltage (V)
5
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0
12 34
Reverse Voltage (V)
5
ESD Clamping of I/O_1 to I/O_2
(+8kV Contact per IEC 61000-4-2)
ESD Clamping of I/O_1 to I/O_2
(-8kV Contact per IEC 61000-4-2)
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
-10.0
-20.0
-50
0
50 100 150 200
Time (ns)
20.0
10.0
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
-50 0 50 100 150 200
Time (ns)
Document ID : DS-22V01
3
Revised Date : 2016/08/29
Revision : C

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Chip Integration Technology Corporation
Package Outline
DFN0603-2L package
2 leads
MSL-1
T0501MA
Low Capacitance ESD Protection Device
Document ID : DS-22V01
4
Revised Date : 2016/08/29
Revision : C

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Chip Integration Technology Corporation
Ordering Information
Part Number
T0501MA
Qty per
Reel
10,000
Reel
Size
7inch
Carries Tape Specification
T0501MA
Low Capacitance ESD Protection Device
A0 B0 K0
0.37 +/-0.03 0.67 +/-0.03 0.32 +/-0.02 mm
Note:All dimensions in mm unless otherwise specified
Device Orientation in Tape
Date Code Location
(Towards Sprocket Holes)
Document ID : DS-22V01
5
Revised Date : 2016/08/29
Revision : C