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P-Channel Enhancement MOSFET
ME1303AT3/ME1303AT3-G
GENERAL DESCRIPTION
The ME1303AT3 is the P-Channel logic enhancement mode power
field effect transistors are produced using high cell density , DMOS
trench technology. This high density process is especially tailored to
minimize on-state resistance. These devices are particularly suited
for low voltage application such as cellular phone and notebook
computer power management and other battery powered circuits
where high-side switching and low in-line power loss are needed in a
very small outline surface mount package.
PIN CONFIGURATION
(SOT-323)
Top View
FEATURES
-20V/-3.4A,RDS(ON)=95mΩ@VGS=-4.5V
-20V/-2.4A,RDS(ON)=120mΩ@VGS=-2.5V
-20V/-1.7A,RDS(ON)=180mΩ@VGS=-1.8V
Super high density cell design for extremely low RDS(ON)
Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
LCD Display inverter
* The Ordering Information: ME1303AT3 (Pb-free)
ME1303AT3-G (Green product-Halogen free)
Absolute Maximum Ratings (TA=25Unless Otherwise Noted)
Parameter
Symbol
Maximum Ratings
Drain-Source Voltage
VDS -20
Gate-Source Voltage
VGS ±12
Continuous Drain Current
TA=25
TA=70
ID
-2.6
-2.1
Pulsed Drain Current
Maximum Power Dissipation
TA=25
TA=70
IDM
PD
-10
1.0
0.7
Operating Junction Temperature
TJ -55 to 150
Thermal Resistance-Junction to Ambient*
RθJA
120
* The device mounted on 1in2 FR4 board with 2 oz copper
Jan, 2007-Ver1.1
Sep, 2012-Ver4.3
Unit
V
V
A
A
W
/W
DCC
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P-Channel Enhancement MOSFET
ME1303AT3/ME1303AT3-G
Electrical Characteristics (TA =25Unless Otherwise Specified)
Symbol Parameter
Limit
Min Typ Max Unit
STATIC
V(BR)DSS
VGS(th)
Drain-Source Breakdown Voltage
Gate Threshold Voltage
VGS=0V, ID=-250μA
VDS=VGS, ID=-250μA
-20
-0.3
V
-0.8 V
IGSS Gate Leakage Current
IDSS Zero Gate Voltage Drain Current
VDS=0V, VGS=±12V
VDS=-20V, VGS=0V
±100
-1
nA
μA
RDS(ON)
Drain-Source On-Resistance
VGS=-4.5V, ID= -3.4A
VGS=-2.5V, ID= -2.4A
76 95
97 120 mΩ
VGS=-1.8V, ID= -1.7A
140 180
VSD Diode Forward Voltage
IS=-1.5A, VGS=0V
-0.8 -1.2
V
DYNAMIC
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDS=-6V, VGS=-4.5V,
ID=-2.8A
10
2.4 nC
2.2
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS=-6V, VGS=0V,
f=1MHz
1100
200
40
pF
td(on)
tr
td(off)
tf
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
VDD=-6V, RL =6Ω
ID=-1.0A, VGEN=-4.5V
RG=6Ω
Notes: a. Pulse test; pulse width 300us, duty cycle2%
43
30
ns
56
6.2
b. Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice.
Sep, 2012-Ver4.3
DCC
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P-Channel Enhancement MOSFET
ME1303AT3/ME1303AT3-G
Typical Characteristics (TJ =25Noted)
Sep, 2012-Ver4.3
DCC
正式發行
03

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P-Channel Enhancement MOSFET
ME1303AT3/ME1303AT3-G
Typical Characteristics (TJ =25Noted)
Sep, 2012-Ver4.3
DCC
正式發行
04

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P-Channel Enhancement MOSFET
ME1303AT3/ME1303AT3-G
Sep, 2012-Ver4.3
DCC
正式發行
05