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MCP2561/2
High-Speed CAN Transceiver
Features:
• Supports 1 Mb/s Operation
• Implements ISO-11898-5 Standard Physical Layer
Requirements
• Very Low Standby Current (5 µA, typical)
• VIO Supply Pin to Interface Directly to
CAN Controllers and Microcontrollers with
1.8V to 5.5V I/O
• SPLIT Output Pin to Stabilize Common Mode in
Biased Split Termination Schemes
• CAN Bus Pins are Disconnected when Device is
Unpowered
- An Unpowered Node or Brown-Out Event will
Not Load the CAN Bus
• Detection of Ground Fault:
- Permanent Dominant Detection on TXD
- Permanent Dominant Detection on Bus
• Power-on Reset and Voltage Brown-Out
Protection on VDD and VIO Pin
• Protection Against Damage Due to Short-Circuit
Conditions (Positive or Negative Battery Voltage)
• Protection Against High-Voltage Transients in
Automotive Environments
• Automatic Thermal Shutdown Protection
• Suitable for 12V and 24V Systems
• Meets or exceeds stringent automotive design
requirements including “Hardware Requirements
for LIN, CAN and FlexRay Interfaces in Automo-
tive Applications”, Version 1.3, May 2012
• High-Noise Immunity Due to Differential Bus
Implementation
• High ESD Protection on CANH and CANL, Meets
IEC61000-4-2 greater ±8 kV
• Available in PDIP-8L, SOIC-8L and 3x3 DFN-8L
• Temperature ranges:
- Extended (E): -40°C to +125°C
- High (H): -40°C to +150°C
Description:
The MCP2561/2 is a Microchip Technology Inc. second
generation high-speed CAN transceiver. It serves as an
interface between a CAN protocol controller and the
physical two-wire CAN bus.
The device meets the automotive requirements for
high-speed (up to 1 Mb/s), low quiescent current,
electromagnetic compatibility (EMC) and electrostatic
discharge (ESD).
Package Types
MCP2561
PDIP, SOIC
TXD 1
VSS 2
VDD 3
RXD 4
8 STBY
7 CANH
6 CANL
5 SPLIT
MCP2562
PDIP, SOIC
TXD 1
VSS 2
VDD 3
RXD 4
8 STBY
7 CANH
6 CANL
5 VIO
MCP2561
3x3 DFN*
TXD 1
8 STBY
VSS 2 EP 7 CANH
VDD 3 9 6 CANL
RXD 4
5 SPLIT
MCP2562
3x3 DFN*
TXD 1
8 STBY
VSS 2 EP 7 CANH
VDD 3 9 6 CANL
RXD 4
5 VIO
* Includes Exposed Thermal Pad (EP); see Table 1-2
MCP2561/2 Family Members
Device
Feature
Description
MCP2561
Split pin
Common mode stabilization
MCP2562
VIO pin
Internal level shifter on digital I/O pins
Note: For ordering information, see the “Product Identification System” section on page 27.
2013 Microchip Technology Inc.
DS25167B-page 1

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MCP2561/2
Block Diagram
SPLIT(2)
VIO(3)
VDD/2
Digital I/O
Supply
TXD
STBY
VIO
Permanent
Dominant Detect
VIO
Mode
Control
VDD
Thermal
Protection
POR
UVLO
Driver
and
Slope Control
CANH
CANL
Wake-Up
Filter
LP_RX(1)
CANH
CANL
Receiver
RXD CANH
HS_RX
CANL
VSS
Note 1: There is only one receiver implemented. The receiver can operate in Low-Power or High-Speed mode.
2: Only MCP2561 has the SPLIT pin.
3: Only MCP2562 has the VIO pin. In MCP2561, the supply for the digital I/O is internally connected to VDD.
DS25167B-page 2
2013 Microchip Technology Inc.

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MCP2561/2
1.0 DEVICE OVERVIEW
1.1 Mode Control Block
The MCP2561/2 is a high-speed CAN, fault-tolerant
device that serves as the interface between a CAN
protocol controller and the physical bus. The
MCP2561/2 device provides differential transmit and
receive capability for the CAN protocol controller, and
is fully compatible with the ISO-11898-5 standard. It will
operate at speeds of up to 1 Mb/s.
Typically, each node in a CAN system must have a
device to convert the digital signals generated by a
CAN controller to signals suitable for transmission over
the bus cabling (differential output). It also provides a
buffer between the CAN controller and the high-voltage
spikes that can be generated on the CAN bus by
outside sources.
The MCP2561/2 supports two modes of operation:
• Normal
• Standby
These modes are summarized in Table 1-1.
1.1.1 NORMAL MODE
Normal mode is selected by applying a low-level to the
STBY pin. The driver block is operational and can drive
the bus pins. The slopes of the output signals on CANH
and CANL are optimized to produce minimal
electromagnetic emissions (EME).
The high speed differential receiver is active.
1.1.2 STANDBY MODE
The device may be placed in Standby mode by
applying a high-level to the STBY pin. In Standby
mode, the transmitter and the high-speed part of the
receiver are switched off to minimize power
consumption. The low-power receiver and the wake-up
filter block are enabled in order to monitor the bus for
activity. The receive pin (RXD) will show a delayed
representation of the CAN bus, due to the wake-up
filter.
TABLE 1-1:
Mode
Normal
Standby
MODES OF OPERATION
STBY Pin
LOW
RXD Pin
HIGH
LOW
HIGH
Bus is dominant
Wake-up request is detected
Bus is recessive
No wake-up request detected
1.2 Transmitter Function
The CAN bus has two states: Dominant and
Recessive. A Dominant state occurs when the
differential voltage between CANH and CANL is
greater than VDIFF(D)(I). A Recessive state occurs
when the differential voltage is less than VDIFF(R)(I).
The Dominant and Recessive states correspond to the
Low and High state of the TXD input pin, respectively.
However, a Dominant state initiated by another CAN
node will override a Recessive state on the CAN bus.
1.3 Receiver Function
In Normal mode, the RXD output pin reflects the differ-
ential bus voltage between CANH and CANL. The Low
and High states of the RXD output pin correspond to the
Dominant and Recessive states of the CAN bus,
respectively.
1.4 Internal Protection
CANH and CANL are protected against battery short-
circuits and electrical transients that can occur on the
CAN bus. This feature prevents destruction of the
transmitter output stage during such a fault condition.
The device is further protected from excessive current
loading by thermal shutdown circuitry that disables the
output drivers when the junction temperature exceeds
a nominal limit of +175°C. All other parts of the chip
remain operational, and the chip temperature is low-
ered due to the decreased power dissipation in the
transmitter outputs. This protection is essential to
protect against bus line short-circuit-induced damage.
2013 Microchip Technology Inc.
DS25167B-page 3

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MCP2561/2
1.5 Permanent Dominant Detection
The MCP2561/2 device prevents two conditions:
• Permanent dominant condition on TXD
• Permanent dominant condition on the bus
In Normal mode, if the MCP2561/2 detects an
extended Low state on the TXD input, it will disable the
CANH and CANL output drivers in order to prevent the
corruption of data on the CAN bus. The drivers will
remain disabled until TXD goes High.
In Standby mode, if the MCP2561/2 detects an
extended dominant condition on the bus, it will set the
RXD pin to Recessive state. This allows the attached
controller to go to Low-Power mode until the dominant
issue is corrected. RXD is latched High until a
Recessive state is detected on the bus, and the
wake-up function is enabled again.
Both conditions have a time-out of 1.25 ms (typical).
This implies a maximum bit time of 69.44 µs
(14.4 kHz), allowing up to 18 consecutive dominant bits
on the bus.
1.6 Power-On Reset (POR) and
Undervoltage Detection
The MCP2561/2 has undervoltage detection on both
supply pins: VDD and VIO. Typical undervoltage thresh-
olds are 1.2V for VIO and 4V for VDD.
When the device is powered on, CANH and CANL
remain in a high-impedance state until both VDD and
VIO exceed their undervoltage levels. In addition,
CANH and CANL will remain in a high-impedance state
if TXD is Low when both undervoltage thresholds are
reached. CANH and CANL will become active only
after TXD is asserted High. Once powered on, CANH
and CANL will enter a high-impedance state if the volt-
age level at VDD or VIO drop below the undervoltage
levels, providing voltage brown-out protection during
normal operation.
In Normal mode, the receiver output is forced to
Recessive state during an undervoltage condition. In
Standby mode, the low-power receiver is only enabled
when both VDD and VIO supply voltages rise above
their respective undervoltage thresholds. Once these
threshold voltages are reached, the low-power receiver
is no longer controlled by the POR comparator and
remains operational down to about 2.5V on the VDD
supply (MCP2561/2). The MCP2562 transfers data to
the RXD pin down to 1V on the VIO supply.
1.7 Pin Descriptions
Table 1-2 describes the pinout.
TABLE 1-2: MCP2561/2 PINOUT
MCP2561 MCP2561
3x3 DFN PDIP, SOIC
MCP2562
3x3 DFN
MCP2562
PDIP, SOIC
Symbol
Pin Function
1 1 1 1 TXD Transmit Data Input
2 2 2 2 VSS Ground
3 3 3 3 VDD Supply Voltage
4 4 4 4 RXD Receive Data Output
5 5 — — SPLIT Common Mode Stabilization - MCP2561 only
——
5
5 VIO Digital I/O Supply Pin - MCP2562 only
6 6 6 6 CANL CAN Low-Level Voltage I/O
7 7 7 7 CANH CAN High-Level Voltage I/O
8 8 8 8 STBY Standby Mode Input
9 — 9 — EP Exposed Thermal Pad
DS25167B-page 4
2013 Microchip Technology Inc.

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1.7.1
TRANSMITTER DATA
INPUT PIN (TXD)
The CAN transceiver drives the differential output pins
CANH and CANL according to TXD. It is usually
connected to the transmitter data output of the CAN
controller device. When TXD is Low, CANH and CANL
are in the Dominant state. When TXD is High, CANH
and CANL are in the Recessive state, provided that
another CAN node is not driving the CAN bus with a
Dominant state. TXD is connected to an internal pull-up
resistor (nominal 33 k) to VDD or VIO, in the MCP2561
or MCP2562, respectively.
1.7.2 GROUND SUPPLY PIN (VSS)
Ground supply pin.
1.7.3 SUPPLY VOLTAGE PIN (VDD)
Positive supply voltage pin. Supplies transmitter and
receiver.
1.7.4
RECEIVER DATA
OUTPUT PIN (RXD)
RXD is a CMOS-compatible output that drives High or
Low depending on the differential signals on the CANH
and CANL pins, and is usually connected to the
receiver data input of the CAN controller device. RXD is
High when the CAN bus is Recessive, and Low in the
Dominant state. RXD is supplied by VDD or VIO, in the
MCP2561 or MCP2562, respectively.
1.7.5 SPLIT PIN (MCP2561 ONLY)
Reference Voltage Output (defined as VDD/2). The pin
is only active in Normal mode. In Standby mode, or
when VDD is off, SPLIT floats.
1.7.6 VIO PIN (MCP2562 ONLY)
Supply for digital I/O pins. In the MCP2561, the supply
for the digital I/O (TXD, RXD and STBY) is internally
connected to VDD.
1.7.7 CAN LOW PIN (CANL)
The CANL output drives the Low side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator. CANL disconnects from the
bus when MCP2561/2 is not powered.
1.7.8 CAN HIGH PIN (CANH)
The CANH output drives the high-side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator. CANH disconnects from the
bus when MCP2561/2 is not powered.
MCP2561/2
1.7.9 STANDBY MODE INPUT PIN (STBY)
This pin selects between Normal or Standby mode. In
Standby mode, the transmitter, high speed receiver and
SPLIT are turned off, only the low power receiver and
wake-up filter are active. STBY is connected to an
internal MOS pull-up resistor to VDD or VIO, in the
MCP2561 or MCP2562, respectively. The value of the
MOS pull-up resistor depends on the supply voltage.
Typical values are 660 kfor 5V, 1.1 Mfor 3.3V and
4.4 Mfor 1.8V
1.7.10 EXPOSED THERMAL PAD (EP)
It is recommended to connect this pad to VSS to
enhance electromagnetic immunity and thermal
resistance.
2013 Microchip Technology Inc.
DS25167B-page 5