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ATA8510/ATA8515
UHF ASK/FSK Transceiver
DATASHEET
Features
AVR® microcontroller core with 1Kbyte SRAM and 24Kbyte RF library in firmware
(ROM)
Atmel® ATA8515: No user memory — RF library in firmware only
Atmel ATA8510: 20Kbyte of user Flash
Supported frequency ranges
Low-band 310MHz to 318MHz, 418MHz to 477MHz
High-band 836MHz to 956MHz
315.00MHz/433.92MHz/868.30MHz and 915.00MHz with one 24.305MHz crystal
Low current consumption
9.8mA for RXMode (low-band), 1.2mA for 21ms cycle three-channel polling
9.4mA/13.8mA for TXMode (low-band, Pout = 6dBm/10dBm)
Typical OFFMode current of 5nA (maximum 600nA at VS = 3.6V and T = 85°C)
Programmable output power –12dBm to +14.5dBm (0.4dB step)
Supports the 0dBm class of ARIB STD-T96
ASK shaping to reduce spectral bandwidth of modulated PA output signal
Input 1dB compression point
–48dBm (full sensitivity level)
–20dBm (active antenna damping)
Programmable channel frequency with fractional-N PLL
93Hz resolution for low-band
185Hz resolution for high-band
FSK deviation ±0.375kHz to ±93kHz
FSK sensitivity (Manchester coded) at 433.92MHz
–108.5dBm at 20Kbit/s f = ±20kHz
–111dBm at 10Kbit/s
f = ±10kHz
–114dBm at 5Kbit/s
f = ±5kHz
–122.5dBm at 0.75Kbit/s f = ±0.75kHz
ASK sensitivity (Manchester coded) at 433.92MHz
BWIF = 165kHz
BWIF = 165kHz
BWIF = 165kHz
BWIF = 25kHz
–110.5dBm at 20Kbit/s BWIF = 80kHz
–125dBm at 0.5Kbit/s
BWIF = 25kHz
Programmable Rx-IF bandwidth 25kHz to 366kHz (approximately 10% steps)
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Blocking (BWIF = 165kHz): 64dBc at frequency offset = 1MHz and 48dBc at 225kHz
High image rejection: 55dB at 315MHz/433.92MHz and 47dB at 868.3MHz/915MHz without calibration
Supported data rate in buffered mode 0.5Kbit/s to 80Kbit/s (120Kbit/s NRZ)
Supports pattern-based wake-up and start of frame identification
Flexible service configuration concept with on-the-fly (OTF) modification (in IDLEMode) of SRAM service parameters
(data rate, …)
Each service consists of
One service-specific configuration part
Three channel-specific configuration parts
Three service configurations are located in EEPROM
Two service configurations are located in SRAM and can be modified via SPI or embedded application
software
Digital RSSI with very high relative accuracy of ±1dB thanks to digitized IF processing
Programmable clock output derived from crystal frequency
1024byte EEPROM data memory for transceiver configuration
SPI interface for Rx/Tx data access and transceiver configuration
500Kbit SPI data rate for short periods on SPI bus and host controller
On demand services (SPI or API) without polling or telegram reception
Integrated temperature sensor
Self check and calibration with temperature measurement
Configurable EVENT signal indicates the status of the IC to an external microcontroller
Automatic antenna tuning at Tx center frequency for loop antenna
Automatic low-power channel polling
Flexible polling configuration concerning timing, order and participating channels
Fast Rx/Tx reaction time
Power-up (typical 1.5ms OFFMode -> TXMode, OFFMode -> RXMode)
RXMode <-> TXMode switching (typical 500µs)
Supports mixed ASK/FSK telegrams
Non-byte aligned data reception and transmission
Software customization
Antenna diversity with external switch via GPIO control
Antenna diversity with internal SPDT switch
Supply voltage range 1.9V to 3.6V
Temperature range –40°C to +85C
ESD protection at all pins (±4kV HBM, ±200V MM, ±750V FCDM)
Small 55mm QFN32 package/pitch 0.5mm
Suitable for applications governed by EN 300 220 and FCC part 15, title 47
Applications
Remote Control System
Home and Building Automation
Wireless Sensor Networks
Weather stations
Battery operated remote controls
Smoke detectors
Wireless alarm and security systems
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1. General Description
1.1 Introduction
The Atmel® ATA8510/15 is a highly integrated, low-power UHF ASK/FSK RF transceiver with an integrated AVR®
microcontroller.
The Atmel ATA8510/15 is partitioned into three sections; an RF front end, a digital baseband and the low-power 8-bit AVR
microcontroller. The product is designed for the ISM frequency bands in the ranges of 310MHz to 318MHz, 418MHz to
477MHz and 836MHz to 956MHz. The external part count is kept to a minimum due to the very high level of integration in
this device. By combining outstanding RF performance with highly sophisticated baseband signal processing, robust
wireless communication can be easily achieved. The receive path uses a low-IF architecture with an integrated double
quadrature receiver and digitized IF processing. This results in high image rejection and excellent blocking performance. The
transmit path uses a closed loop fractional-N modulator with Gauss shaping and pre-emphasis functionality for high data
rates. In addition, highly flexible and configurable baseband signal processing allows the transceiver to operate in several
scanning, wake-up and automatic self-polling scenarios. For example, during polling the IC can scan for specific message
content (IDs) and save valid telegram data in the FIFO buffer for later retrieval. The device integrates two receive paths that
enable a parallel search for two telegrams with different modulations, data rates, wake-up conditions, etc.
The Atmel ATA8510/15 implements a flexible service configuration concept and supports up to 15 channels. The channels
are grouped into five service configurations with three channels each. Three service configurations are located in the
EEPROM. Two service configurations are located in the SRAM to allow on-the-fly modifications during IDLEMode via SPI
commands or application software. The application software is located in the Flash for Atmel ATA8510. Highly configurable
and autonomous scanning capability enables flexible polling scenarios with up to 15 channels. The configuration of the
transceiver is stored in a 1024byte EEPROM. The SPI interface enables external control and device reconfiguration.
Table 1-1. Program Memory Comparison of Atmel ATA8510/15 Devices
Device
Atmel ATA8515
Atmel ATA8510
Atmel Firmware ROM
24Kbyte
24Kbyte
User Flash
-
20Kbyte
User ROM
-
-
In the Atmel ATA8510 the internal microcontroller with 20Kbyte user flash can be used to add custom extensions to the
Atmel firmware. The Atmel ATA8515 embeds only the firmware ROM without user memory.
The debugWIRE and ISP interface are available for programming purposes.
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1.2 System Overview
Figure 1-1. Circuit Overview
SRC, FRC
Oscillators
Supply
Reset
RFIN
RF_OUT
RF
Front End
Rx DSP
Tx DSP
AVR CPU
XTO
DATA BUS
Port B (8)
Port C (6)
XTAL
PB[7..0]
(SPI)
PC[5..0]
Figure 1-1 shows an overview of the main functional blocks of the Atmel® ATA8510/15. External control of the
Atmel ATA8510/15 is performed through the SPI pins SCK, MOSI, MISO, and NSS on port B. The configuration of the
Atmel ATA8510/15 is stored in the EEPROM and a large portion of the functionality is defined by the firmware located in the
ROM and processed by the AVR®. An SPI command can trigger the AVR to configure the hardware according to settings
that are stored in the EEPROM and start up a given system mode (e.g., RXMode, TXMode or PollingMode). Internal events
such as “Start of Telegram” or “FIFO empty” are signaled to an external microcontroller on pin 28 (PB6/EVENT).
During the start-up of a service, the relevant part of the EEPROM content is copied to the SRAM. This allows faster access
by the AVR during the subsequent processing steps and eliminates the need to write to the EEPROM during runtime
because parameters can be modified directly in the SRAM. As a consequence the user does not need to observe the
EEPROM read/write cycle limitations.
It is important to note that all PWRON and NPWRON pins (PC1..5, PB4, PB7) are active in OFFMode. This means that even
if the Atmel ATA8510/15 is in OFFMode and the DVCC voltage is switched off, the power management circuitry within the
Atmel ATA8510/15 biases these pins with VS.
AVR ports can be used as button inputs, external LNA supply voltage (RX_ACTIVE), LED drivers, EVENT pin, switching
control for additional SPDT switches, general purpose digital inputs, or wake-up inputs, etc. Some functionality of these ports
is already implemented in the firmware and can be activated by adequate EEPROM configurations. Other functionality is
available only through custom software residing in the 20Kbyte flash program memory (Atmel ATA8510).
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1.3 Pinning
Figure 1-2. Pin Diagram
RFIN_LB
RFIN_HB
32 31 30 29 28 27 26 25
1
exposed die pad
2
24 PB2
23 PB1
SPDT_RX 3
SPDT_ANT 4
ANT_TUNE 5
SPDT_TX 6
Atmel
ATA8510
ATA8515
22 PB0
21 DGND
20 DVCC
19 PC5
RF_OUT 7
18 PC4
VS_PA 8
17 PC3
9 10 11 12 13 14 15 16
Note:
The exposed die pad is connected to the internal die.
Table 1-2. Pin Description
Pin
No. Pin Name Type
Equivalent Circuit
1 RFIN_LB Analog
RFIN_LB
(Pin 1)
GND
2 RFIN_HB Analog
RFIN_HB
(Pin 2)
GND
Description
LNA input for low-band frequency
range (< 500MHz)
LNA input for high-band frequency
range (> 500MHz)
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