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Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I2C
Product specification
80CL410/83CL410
DESCRIPTION
The 80CL410/83CL410 (hereafter generically
referred to as 8XCL410) is manufactured in
an advanced CMOS process that allows the
part to operate at supply voltages down to
1.8V and oscillator frequencies down to DC.
The 8XCL410 has the same instruction set
as the 80C51.
The 8XCL410 features a 4k byte ROM
(83CL410), 128 bytes RAM (both ROM and
RAM are externally expandable to 64k
bytes), four 8-bit ports, two 16-bit
timer/counters, an I2C serial interface, a
thirteen source, two priority level nested
interrupt structure, and on-chip oscillator
circuitry suitable for quartz crystal, ceramic
resonator, RC, or LC.
The 8XCL410 has two reduced power modes
that are the same as those on the standard
80C51. The special reduced power feature of
this part is that it can be stopped and then
restarted. Running from an external clock
source, the clock can be stopped and after a
period of time restarted. The 8XCL410 will
resume operation from where it was when the
code stopped with no loss of internal state,
RAM contents, or Special Function Register
contents. If the internal oscillator is used the
part cannot be stopped and started, but the
power-down mode, which can be terminated
via an interrupt, can be used to achieve
similar power savings and then restart
without loss of on-chip RAM and Special
Function Register values.
FEATURES
Single supply voltage 1.8V to 6.0V
Frequency from DC to 12MHz
80C51 based architecture
4k × 8 ROM (64k external)
128 × 8 RAM (64k external)
Four 8-bit I/O ports
Two 16-bit timer/counters
A thirteen-source, two-level, nested
priority interrupt structure
10 external interrupts
Fully static 80C51 CPU
I2C Serial Interface
Two power control modes
Idle mode
Power-down mode – can be terminated
by reset or external interrupt
Wake-up via external interrupts at port 1
Single supply voltage 1.8V to 6.0V
Frequency range of DC to 12MHz
On-chip oscillator (quartz crystal, ceramic
resonator, RC, LC)
Very low power consumption
Operating temperature range:
–40 to +85°C
PIN CONFIGURATION
INT2/P1.0 1
INT3/P1.1 2
INT4/P1.2 3
INT5/P1.3 4
INT6/P1.4 5
INT7/P1.5 6
SCL/INT8/P1.6 7
SDA/INT9/P1.7 8
RST 9
P3.0 10
P3.1 11
INT0/P3.2 12
INT1/P3.3 13
T0/P3.4 14
T1/P3.5 15
WR/P3.6 16
RD/P3.7 17
XTAL2 18
XTAL1 19
VSS 20
44
DIP
VSO
40 VDD
39 P0.0/AD0
38 P0.1/AD1
37 P0.2/AD2
36 P0.3/AD3
35 P0.4/AD4
34 P0.5/AD5
33 P0.6/AD6
32 P0.7/AD7
31 EA
30 ALE
29 PSEN
28 P2.7/A15
27 P2.6/A14
26 P2.5/A13
25 P2.4/A12
24 P2.3/A11
23 P2.2/A10
22 P2.1/A9
21 P2.0/A8
34
1 33
QFP
11 23
12 22
SEE NEXT PAGE FOR QFP PIN FUNCTIONS.
ORDERING CODE
PHILIPS PART ORDER NUMBER
PART MARKING
ROMless
ROM
PHILIPS NORTH AMERICA
PART ORDER NUMBER1
ROMless
ROM
TEMPERATURE °C
AND PACKAGE
FREQUENCY
Drawing
Number
P80CL410HFP
P83CL410HFP
P80CL410HF N P83CL410HF N
–40 to +85,
40-Pin Plastic Dual In-line Package
32kHZ to 12MHz SOT129-1
P80CL410HFT P83CL410HFT P80CL410HF D P83CL410HF D
–40 to +85,
40-Pin Plastic Very Small Outline
Package
32kHZ to 12MHz SOT158-1
P83CL410HFH
–40 to +85,
44-Pin Plastic Quad Flat Pack
NOTE:
1. Parts ordered by the Philips North America part number will be marked with the Philips part marking.
32kHZ to 12MHz SOT307-2
For emulation purposes, the P85CL000 (Piggyback version) with 256 bytes of RAM is recommended.
1995 Jan 20
3-270

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Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I2C
Product specification
80CL410/83CL410
PLASTIC QUAD FLAT PACK
PIN FUNCTIONS
44 34
1 33
QFP
11 23
12
Pin Function
1 P1.5/INT7
2 P1.6/INT8/SCL
3 P1.7/INT9/SDA
4 RST
5 P3.0
6 NC
7 P3.1
8 P3.2/INT0
9 P3.3/INT1
10 P3.4/T0
11 P3.5/T1
12 P3.6/WR
13 P3.7/RD
14 XTAL2
15 XTAL1
16 VSS
17 NC
18 P2.0/A8
19 P2.1/A9
20 P2.2/A10
21 P2.3/A11
22 P2.4/A12
22
Pin Function
23 P2.5/A13
24 P2.6/A14
25 P2.7/A15
26 PSEN
27 ALE
28 NC
29 EA
30 P0.7/AD7
31 P0.6/AD6
32 P0.5/AD5
33 P0.4/AD4
34 P0.3/AD3
35 P0.2/AD2
36 P0.1/AD1
37 P0.0/AD0
38 VDD
39 NC
40 P1.0/INT2
41 P1.1/INT3
42 P1.2/INT4
43 P1.3/INT5
44 P1.4/INT6
LOGIC SYMBOL
VDD VSS
XTAL1
XTAL2
RST
EA
PSEN
ALE
INT0
INT1
T0
T1
WR
RD
Address and
Data Bus
INT2
INT3
INT4
INT5
INT6
INT7
INT8/SCL
INT9/SDA
Address Bus
1995 Jan 20
3-271

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Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I2C
BLOCK DIAGRAM
FREQUENCY
REFERENCE
XTAL2 XTAL1
OSCILLATOR
AND
TIMING
PROGRAM
MEMORY
(4K × 8 ROM)
DATA
MEMORY
(128 × 8 RAM)
Product specification
80CL410/83CL410
COUNTER (1)
T0 T1
TWO 16-BIT
TIMER/EVENT
COUNTERS
CPU
10 3
INTERNAL
INTERRUPTS
64K BYTE BUS
EXPANSION
CONTRTOL
PROGRAMMABLE I/O
I2C-BUS SERIAL I/O
EXTERNAL
INTERRUPTS (1)
(1) Pins shared with parallel port pins.
CONTROL
PARALLEL PORTS,
ADDRESS/DATA BUS
AND I/O PINS
SDA
SCL
(1)
1995 Jan 20
3-272

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Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I2C
Product specification
80CL410/83CL410
PIN DESCRIPTION
MNEMONIC
PIN NO.
QFP
DIL40/
VSO40
VSS 16 20
VDD 38 40
P0.0–0.7
30–37
39–32
P1.0–P1.7
40–44
1–3
1–8
P2.0–P2.7
18–25
7
8
1–8
21–28
P3.0–P3.7
5, 7–13
10–17
RST
ALE
PSEN
8 12
9 13
10 14
11 15
12 16
13 17
49
27 30
26 29
EA
XTAL1
XTAL2
29 31
15 19
14 18
TYPE
NAME AND FUNCTION
I Ground: 0V reference.
I Power Supply: This is the power supply voltage for normal, idle, and power-down
operation.
I/O Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written
to them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data
memory. In this application, it uses strong internal pull-ups when emitting 1s.
I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that
have 1s written to them are pulled high by the internal pull-ups and can be used as
inputs. As inputs, port 1 pins that are externally pulled low will source current because
of the internal pull-ups. (See DC Electrical Characteristics: IIL). Additional functions
include:
I/O SCL (P1.6): I2C serial bus clock.
I/O SDA (P1.7): I2C serial bus data.
I INT2–INT9 (P1.0–P1.7): Additional external interrupts.
I/O Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that
have 1s written to them are pulled high by the internal pull-ups and can be used as
inputs. As inputs, port 2 pins that are externally being pulled low will source current
because of the internal pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits
the high-order address byte during fetches from external program memory and during
accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this
application, it uses strong internal pull-ups when emitting 1s. During accesses to
external data memory that use 8-bit addresses (MOV @Ri), port 2 emits the contents
of the P2 special function register.
I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that
have 1s written to them are pulled high by the internal pull-ups and can be used as
inputs. As inputs, port 3 pins that are externally being pulled low will source current
because of the pull-ups. (See DC Electrical Characteristics: IIL). Port 3 also serves the
special features of the 80C51 family, as listed below:
I INT0 (P3.2): External interrupt 0
I INT1 (P3.3): External interrupt 1
I T0 (P3.4): Timer 0 external input
I T1 (P3.5): Timer 1 external input
O WR (P3.6): External data memory write strobe
O RD (P3.7): External data memory read strobe
I Reset: A high on this pin for two machine cycles while the oscillator is running, resets
the device. An internal diffused resistor to VSS permits a power-on reset using only an
external capacitor to VDD.
O Address Latch Enable: Output pulse for latching the low byte of the address during
an access to external memory. In normal operation, ALE is emitted at a constant rate
of 1/6 the oscillator frequency, and can be used for external timing or clocking. Note
that one ALE pulse is skipped during each access to external data memory.
O Program Store Enable: The read strobe to external program memory. When the
device is executing code from the external program memory, PSEN is activated twice
each machine cycle, except that two PSEN activations are skipped during each
access to external data memory. PSEN is not activated during fetches from internal
program memory.
I External Access Enable: EA must be externally held low to enable the device to
fetch code from external program memory locations 0000H to 0FFFH. If EA is held
high, the device executes from internal program memory unless the program counter
contains an address greater than 0FFFH.
I Crystal 1: Input to the inverting oscillator amplifier and input for an external clock
source.
O Crystal 2: Output from the inverting oscillator amplifier.
1995 Jan 20
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Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I2C
Product specification
80CL410/83CL410
Table 1. 8XCL410 Special Function Registers
SYMBOL
DESCRIPTION
DIRECT
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
ADDRESS MSB
LSB
ACC*
Accumulator
E0H
E7 E6
E5
E4
E3
E2
E1
E0
B* B register
F0H
F7 F6
F5
F4
F3
F2
F1
F0
RESET
VALUE
00H
00H
DPTR:
DPH
DPL
Data pointer
(2 bytes):
High byte
Low byte
IP0*#
Interrupt priority 0
IP1*#
Interrupt priority 1
83H 00H
82H 00H
BF BE
BD
BC BB
BA
B9
B8
B8H – – PS1 – PT1 PX1 PT0 PX0 xx000000B
FF FE FD FC FB FA F9 F8
F8H PX9 PX8 PX7 PX6 PX5 PX4 PX3 PX2 00H
IEN0*#
Interrupt enable 0
A8H
IEN1*#
Interrupt enable 1
E8H
IRQ1*#
IX1#
P0*
P1*
P2*
P3*
Interrupt request flag
Interrupt polarity
Port 0
Port 1
Port 2
Port 3
C0H
E9H
80H
90H
A0H
B0H
AF AE
AD
AC AB
AA
A9
A8
EA – ES1 – ET1 EX1 ET0 EX0 00H
EF EE
ED
EC EB
EA
E9
E8
EX9 EX8 EX7 EX6 EX5 EX4 EX3 EX2 00H
C7 C6
C5
C4
C3
C2
C1
C0
IQ9 IQ8
IQ7
IQ6
IQ5
IQ4
IQ3
IQ2 00H
00H
87 86
85
84
83
82
81
80 FFH
97 96
95
94
93
92
91
90 FFH
A7 A6
A5
A4
A3
A2
A1
A0 FFH
B7 B6
B5
B4
B3
B2
B1
B0 FFH
PCON
Power control
87H SMOD –
– GF1 GF0 PD IDL 0xxx0000B
D7 D6
D5
D4
D3
D2
D1
D0
PSW*
Program status word
D0H
CY AC
F0
RS1 RS0
OV
P 00H
S1ADR# Slave address
S1CON*#
S1DAT#
S1STA#
SP
Serial control
Serial data
Serial status
Stack pointer
TCON*
Timer/counter con-
trol
DBH
D8H
DAH
D9H
81H
88H
DF DE
DD
– ENS1 STA
DC
STO
DB
SI
8F 8E
8D
8C
8B
TF1 TR1 TF0 TR0 IE1
00H
DA D9 D8
AA CR1 CR0 x0000000B
00H
11111000B
07H
8A 89 88
IT1 IE0 IT0 00H
TMOD
Timer/counter mode
89H GATE C/T M1
M0 GATE C/T
M1
M0 00H
TH0 Timer 0 high byte
8CH
00H
TH1 Timer 1 high byte
8DH
00H
TL0 Timer 0 low byte
8AH
00H
TL1 Timer 1 low byte
8BH
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
00H
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