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RM80N30LD
N-Channel Enhancement Mode Power MOSFET
Description
The RM80N30LD uses advanced trench technology and
design to provide excellent RDS(ON) with low gate charge. It
can be used in a wide variety of applications.
General Features
ƽ VDS =30V,ID =80A
RDS(ON) <6.5mΩ @ VGS=10V
RDS(ON) < 10mΩ @ VGS=5V
ƽ High density cell design for ultra low Rdson
ƽ Fully characterized avalanche voltage and current
ƽ Good stability and uniformity with high EAS
ƽ Excellent package for good heat dissipation
Application
ƽ Power switching application
ƽ Hard switched and high frequency circuits
ƽ Uninterruptible power supply
Schematic diagram
Marking and pin assignment
100% UIS TESTED!
Package Marking and Ordering Information
Device Marking
Device
Device Package
80N30
RM80N30LD
TO-252-2L
Reel Size
-
D
GS
TO-252-2L top view
Tape width
-
Quantity
-
Absolute Maximum Ratings (TC=25ćunless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous
ID
Drain Current-Continuous(TC=100ć)
ID (100ć)
Pulsed Drain Current
Maximum Power Dissipation
IDM
PD
Derating factor
Single pulse avalanche energy (Note 5)
EAS
Operating Junction and Storage Temperature Range
TJ,TSTG
Limit
30
±20
80
50
170
83
0.56
306
-55 To 175
Unit
V
V
A
A
A
W
W/ć
mJ
ć
2016-10
REV:O15

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Thermal Characteristic
Thermal Resistance,Junction-to-Case(Note 2)
RșJC
1.8 ć/W
Electrical Characteristics (TC=25ćunless otherwise noted)
Parameter
Symbol
Condition
Min Typ Max Unit
Off Characteristics
Drain-Source Breakdown Voltage
BVDSS
VGS=0V ID=250ȝA
30 -
-
V
Zero Gate Voltage Drain Current
IDSS
VDS=30V,VGS=0V
- - 1 ȝA
Gate-Body Leakage Current
On Characteristics (Note 3)
IGSS
VGS=±20V,VDS=0V
- - ±100 nA
Gate Threshold Voltage
VGS(th)
VDS=VGS,ID=250ȝA
1 1.6
3
V
Drain-Source On-State Resistance
RDS(ON)
VGS=10V, ID=30A
VGS=5V, ID=24A
- 5.5 6.5
- 7.5
10
Forward Transconductance
Dynamic Characteristics (Note4)
gFS
VDS=5V,ID=24A
20 -
-
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics (Note 4)
Clss
- 2330
-
PF
VDS=15V,VGS=0V,
Coss
- 460
-
PF
F=1.0MHz
Crss
- 230
-
PF
Turn-on Delay Time
td(on)
- 20
-
nS
Turn-on Rise Time
Turn-Off Delay Time
tr
td(off)
VDD=10V,ID=30A
VGS=10V,RGEN=2.7ȍ
- 15
- 60
-
-
nS
nS
Turn-Off Fall Time
tf
- 10
-
nS
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
- 51
-
nC
VDS=10V,ID=30A,
Qgs
- 14
-
nC
VGS=10V
Qgd
- 11
-
nC
Drain-Source Diode Characteristics
Diode Forward Voltage (Note 3)
Diode Forward Current (Note 2)
VSD
VGS=0V,IS=24A
- - 1.2
V
IS
--
80
A
Reverse Recovery Time
Reverse Recovery Charge
trr
TJ = 25°C, IF = 80A
- 32
50
nS
Qrr
di/dt = 100A/ȝs(Note3)
- 12
20
nC
Forward Turn-On Time
ton Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
2. Surface Mounted on FR4 Board, t ” 10 sec.
3. Pulse Test: Pulse Width ” 300ȝs, Duty Cycle ” 2%.
4. Guaranteed by design, not subject to production
5. EAS condition˖Tj=25ć,VDD=15V,VG=10V,L=0.5mH,Rg=25ȍˈIAS=35A
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Test Circuit
1) EAS Test Circuits
2) Gate Charge Test Circuit:
3) Switch Time Test Circuit˖
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RATING AND CHARACTERISTICS CURVES (RM80N30LD)
Vds Drain-Source Voltage (V)
Figure 1 Output Characteristics
TJ-Junction Temperature(ć)
Figure 4 Rdson-JunctionTemperature
Vgs Gate-Source Voltage (V)
Figure 2 Transfer Characteristics
Qg Gate Charge (nC)
Figure 5 Gate Charge
ID- Drain Current (A)
Figure 3 Rdson- Drain Current
Vsd Source-Drain Voltage (V)
Figure 6 Source- Drain Diode Forward
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RATING AND CHARACTERISTICS CURVES (RM80N30LD)
Vds Drain-Source Voltage (V)
Figure 7 Capacitance vs Vds
TJ-Junction Temperature(ć)
Figure 9 BVDSS vs Junction Temperature
Vds Drain-Source Voltage (V)
Figure 8 Safe Operation Area
TJ-Junction Temperature(ć)
Figure 10 VGS(th) vs Junction Temperature
Square Wave Pluse Duration(sec)
Figure 11 Normalized Maximum Transient Thermal Impedance
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