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BIDIRECTIONAL
ESD PROTECTION DIODE
L13ESD5V0CE2
STAND-OFF VOLTAGE - 5.0 Volts
POWER DISSIPATION - 130 Watts
GENERAL DESCRIPTION
The L13ESD5V0CE2 is designed to protect sensitive
electronics from damage or latch up due to ESD,
lightning, and other voltage induced transient events. The
device will protect one line operating at 5.0 volts.
FEATURES
• Bi-directional ESD protection of one line.
• Max. peak pulse power: Ppp=130w at tp = 8/20 us.
• Low clamping voltage
• IEC 61000-4-2, level 4 (ESD), >30KV(air)
;>30KV(contact)
• IEC 61000-4-5, level 1 (surge) ; Ipp=12A at tp =
8/20us.
• Qualified to AEC-Q101 Rev_C
APPLICATION
• Computers and peripherals
• Communication system
• Audio & video equipment
• Portable instrumentation
MECHANICAL DATA
• Case material: “Green” molding compound UL
flammability classification 94V-0 (No Br, Sb, Cl),
• Component in accordance to RoHs 2011/65/EU
• Dimension = DFN, 1.00 mm (L)* 0.6 mm (W)
A
A1
E
L
1
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS
Ratings at 25°C ambient temperature unless otherwise specified.
ABSOLUTE RATINGS
PARAMETER
SYMBOL
Peak pulse power (8/20us waveform)
Peak pulse current (8/20us waveform)
Operating junction temperature range
Storage temperature range
Soldering temperature, t max = 10s
ELECTRICAL CHARACTERISTICS
PPPM
Ipp
TJ
TSTG
TL
PARAMETER
Reverse standoff voltage
Reverse leakage current
Breakdown voltage
Junction capacitance (each I/O pin and ground)
Clamping voltage
TEST CONDITIONS
--
VDRM = 5V
IR = 1 mA
VR = 0V, f = 1MHz,
IPP = 1A (8/20 us)
IPP = 12A (8/20 us)
SYMBOL
VDRM
IRM
VBR
CJ
VCL
SOD-882
SOD-882
DIM. MIN. MAX.
A 0.47 0.53
A1 0.00 0.05
b 0.25 0.55
D
D 0.95 1.075
E 0.55 0.675
b L 0.20 0.45
All dimension in
millimeter
PIN ASSIGNMENT
2 1 Cathode
2 Cathode
VALUE
130
12
-55 to +150
-55 to +150
260
UNIT
W
A
°C
°C
°C
MIN
MAX
UNIT
-- 5.0 V
-- 100 nA
5.5 9.5 V
-- 45 pF
-- 10
V
-- 14
REV. 10, FBE.-2016, KSIR09

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RATING AND CHARACTERISTIC CURVES
L13ESD5V0CE2
100%
Figure 1. 8/20 us pulse waveform
according to IEC 61000-4-5
TJ =25°C, tp (us) = 8/20 us
exponentially decay waveform
10%
tr = 0.7 ~1 ns
Time (ns)
30 ns
60 ns
Figure 2. ESD pulse waveform
according to IEC 61000-4-2
Figure 3. Power Dissipation versus Pulse Time
Figure 4. Peak pulse power versus TJ
TJ =25°C, f=1MHz, Vosc=100mV
Figure 5. Typical Junction Capacitance
Figure 6. Reverse Leakage Current versus TJ

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I/O1
+/-8KV
ESD Contact
discharge
V (i/o)
Figure 7. ESD Test Configuration
Figure 8. Clamped +8 kV ESD voltage waveform
Figure 9. Clamped -8 kV ESD voltage waveform

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MARKING AND PACKAGING INFORMATION
L13ESD5V0CE2
Marking and Orientation :
Note: Marking is none direction
Packaging Information :
DEVICE
L13ESD5V0CE2
Q'TY/REEL
(PCS)
10K
REEL DIA.
(INCH)
7
Q'TY/BOX Q'TY/CARTON
(PCS)
(PCS)
150K
300K
SOD-882 Soldering Pad Layout :
X
V
YW
Z
Dim.
Z
X
W
Y
V
Millimeters
1.30
0.75
0.20
0.55
0.80
Inches
0.051
0.029
0.007
0.021
0.031

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LEGAL DISCLAIMER NOTICE
Important Notice and Disclaimer
LSC reserves the right to make changes to this document and its products and specifications
at any time without notice. Customers should obtain and confirm the latest product
information and specifications before final design, purchase or use.
LSC makes no warranty, representation or guarantee regarding the suitability of its products
for any particular purpose, nor does LSC assume any liability for application assistance or
customer product design. LSC does not warrant or accept any liability with products which are
purchased or used for any unintended or unauthorized application.
No license is granted by implication or otherwise under any intellectual property rights of LSC.
LSC products are not authorized for use as critical components in life support devices or
systems without express written approval of LSC.