AT91M55800A.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 AT91M55800A 데이타시트 다운로드

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Features
Utilizes the ARM7TDMIARM Thumb Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-Circuit Emulation)
8K Bytes Internal SRAM
Fully-programmable External Bus Interface (EBI)
– Maximum External Address Space of 128M Bytes
– Eight Chip Selects
– Software Programmable 8/16-bit External Databus
8-level Priority, Individually Maskable, Vectored Interrupt Controller
– Seven External Interrupts, Including a High-priority, Low-latency Interrupt Request
Fifty-eight Programmable I/O Lines
www.DataSh6e-ecth4Ua.ncnomel 16-bit Timer/Counter
– Six External Clock Inputs and Two Multi-purpose I/O Pins per Channel
Three USARTs
Master/Slave SPI Interface
– 8-bit to 16-bit Programmable Data Length
– Four External Slave Chip Selects
Programmable Watchdog Timer
8-channel 10-bit ADC
2-channel 10-bit DAC
Clock Generator with On-chip Main Oscillator and PLL for Multiplication
– 3 to 20 MHz Frequency Range Main Oscillator
Real-time Clock with On-chip 32 kHz Oscillator
– Battery Backup Operation and External Alarm
8-channel Peripheral Data Controller for USARTs and SPIs
Advanced Power Management Controller (APMC)
– Normal, Wait, Slow, Standby and Power-down modes
IEEE 1149.1 JTAG Boundary-scan on all Digital Pins
Fully Static Operation: 0 Hz to 33 MHz
2.7V to 3.6V Core Operating Range
2.7V to 5.5V I/O Operating Range
2.7V to 3.6V Analog Operating Range
1.8V to 3.6V Backup Battery Operating Range
2.7V to 3.6V Oscillator and PLL Operating Range
-40°C to +85°C Temperature Range
Available in a 176-lead TQFP or 176-ball BGA Package
AT91
ARM® Thumb®
Microcontrollers
AT91M55800A
Description
The AT91M55800A is a member of the Atmel AT91 16/32-bit microcontroller family,
which is based on the ARM7TDMI processor core. This processor has a high-perfor-
mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low
power consumption. In addition, a large number of internally banked registers result in
very fast exception handling, making the device ideal for real-time control applications.
The fully programmable External Bus Interface provides a direct connection to off-chip
memory in as fast as one clock cycle for a read or write operation. An eight-level prior-
ity vectored interrupt controller in conjunction with the peripheral data controller
significantly improve the real-time performance of the device.
The device is manufactured using Atmel’s high-density CMOS technology. By combin-
ing the ARM7TDMI processor core with an on-chip SRAM, a wide range of peripheral
functions, analog interfaces and low-power oscillators on a monolithic chip, the Atmel
AT91M55800A is a powerful microcontroller that provides a highly-flexible and cost-
effective solution to many ultra low-power applications.
Rev. 1745B–ATARM–04/02
1

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Pin Configurations
Table 1. Pin Configuration for 176-lead TQFP Package
Pin AT91M55800A
Pin AT91M55800A
1 GND
45 GND
2 GND
46 GND
3 NCS0
47 D8
4 NCS1
48 D9
5 NCS2
49 D10
6 NCS3
50 D11
7 NLB/A0
51 D12
8 A1
52 D13
9
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A2
A3
53 D14
54 D15
11 A4
55 PB19/TCLK0
12 A5
56 PB20/TIOA0
13 A6
57 PB21/TIOB0
14 A7
58 PB22/TCLK1
15 VDDIO
59 VDDIO
16 GND
60 GND
17 A8
61 PB23/TIOA1
18 A9
62 PB24/TIOB1
19 A10
63 PB25/TCLK2
20 A11
64 PB26/TIOA2
21 A12
65 PB27/TIOB2
22 A13
66 PA0/TCLK3
23 A14
67 PA1/TIOA3
24 A15
68 PA2/TIOB3
25 A16
69 PA3/TCLK4
26 A17
70 PA4/TIOA4
27 A18
71 PA5/TIOB4
28 A19
72 PA6/TCLK5
29 VDDIO
73 VDDIO
30 GND
74 GND
31 A20
75 PA7/TIOA5
32 A21
76 PA8/TIOB5
33 A22
77 PA9/IRQ0
34 A23
78 PA10/IRQ1
35 D0
79 PA11/IRQ2
36 D1
80 PA12/IRQ3
37 D2
81 PA13/FIQ
38 D3
82 PA14/SCK0
39 D4
83 PA15/TXD0
40 D5
84 PA16/RXD0
41 D6
85 PA17/SCK1
42 D7
86 PA18/TXD1/NTRI
43 VDDCORE
87 VDDCORE
44 VDDIO
88 VDDIO
Notes: 1. Analog pins
2. Battery backup pins
Pin AT91M55800A
89 GND
90 GND
91 PA19/RXD1
92 PA20/SCK2
93 PA21/TXD2
94 PA22/RXD2
95 PA23/SPCK
96 PA24/MISO
97 PA25/MOSI
98 PA26/NPCS0/NSS
99 PA27/NPCS1
100 PA28/NPCS2
101 PA29/NPCS3
102 VDDIO
103 GND
104 VDDPLL
105 XIN
106 XOUT
107 GNDPLL
108 PLLRC
109 VDDBU(2)
110 XIN32(2)
111 XOUT32(2)
112 NRSTBU(2)
113 GNDBU(2)
114 WAKEUP(2)
115 SHDN(2)
116 GNDBU(2)
117 VDDA(1)
118 AD0(1)
119 AD1(1)
120 AD2(1)
121 AD3(1)
122 AD4(1)
123 AD5(1)
124 AD6(1)
125 AD7(1)
126 ADVREF(1)
127 DAVREF(1)
128 DA0(1)
129 DA1(1)
130 GNDA(1)
131 VDDCORE
132 VDDIO
Pin AT91M55800A
133 GND
134 GND
135 NCS4
136 NCS5
137 NCS6
138 NCS7
139 PB0
140 PB1
141 PB2
142 PB3/IRQ4
143 PB4/IRQ5
144 PB5
145 PB6/AD0TRIG
146 PB7/AD1TRIG
147 VDDIO
148 GND
149 PB8
150 PB9
151 PB10
152 PB11
153 PB12
154 PB13
155 PB14
156 PB15
157 PB16
158 PB17
159 NWDOVF
160 MCKO
161 VDDIO
162 GND
163 PB18/BMS
164 JTAGSEL
165 TMS
166 TDI
167 TDO
168 TCK
169 NTRST
170 NRST
171 NWAIT
172 NOE/NRD
173 NWE/NWR0
174 NUB/NWR1
175 VDDCORE
176 VDDIO
2 AT91M55800A
1745B–ATARM–04/02

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Table 2. Pin Configuration for 176-ball BGA Package
Pin AT91M55800A
Pin AT91M55800A
A1 NCS1
C1 A0/NLB
A2 NWAIT
C2 NCS0
A3 NRST
C3 VDDIO
A4 NTRST
C4 VDDCORE
A5 PB18/BMS
C5 TMS
A6 NWDOVF
C6 VDDIO
A7 PB16
C7 MCK0
www.DataSheAe8t4U.com PB12
C8 PB13
A9 PB10
C9 PB6/AD0TRIG
A10 PB9
C10 VDDIO
A11 PB8
C11 PB4/IRQ5
A12 NCS7
C12 PB0
A13 NCS6
C13 VDDIO
A14 GND
C14 DA0
A15 DAVREF
C15 ADVREF
B1 NCS2
D1 A2
B2 NUB/NWR1
D2 A1
B3 NWE/NWR0
D3 NCS3
B4 NOE/NRD
D4 GND
B5 TD0
D5 TCK
B6 TDI
D6 JTAGSEL
B7 PB17
D7 GND
B8 PB11
D8 PB15
B9 PB7/AD1TRIG
D9 PB14
B10 PB3/IRQ4
D10 PB5
B11 PB2
D11 PB1
B12 NCS5
D12 GND
B13 NCS4
D13 VDDCORE
B14 DA1
D14 AD7
B15 GNDA
D15 VDDA
AT91M55800A
Pin AT91M55800A
E1 A4
E2 A3
E3 A5
E4 GND
E5 –
E6 –
E7 –
E8 –
E9 –
E10 –
E11 –
E12 AD6
E13 AD5
E14 NRSTBU
E15 GNDBU
F1 A10
F2 A7
F3 VDDIO
F4 A6
F5 –
F6 –
F7 –
F8 –
F9 –
F10 –
F11 –
F12 GND
F13 AD4
F14 VDDBU
F15 XOUT32
Pin
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
H12
H13
H14
H15
AT91M55800A
A12
A9
A8
GND
AD3
AD2
GND
XIN32
A15
A14
A13
A11
AD1
AD0
WAKEUP
GND
1745B–ATARM–04/02
3

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Table 2. Pin Configuration for 176-ball BGA Package (Continued)
Pin AT91M55800A
Pin AT91M55800A
Pin
J1 A17
L1 A20
N1
J2 A18
L2 A23
N2
J3 VDDIO
L3 D0
N3
J4 A16
L4 D1
N4
J5 –
L5 –
N5
J6 –
L6 –
N6
J7 –
L7 –
N7
J8
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J9
L8 –
L9 –
N8
N9
J10 –
L10 –
N10
J11 –
L11 –
N11
J12 PA29/NPCS3
L12 PA25/MOSI
N12
J13 SHDN
L13 PA22RXD2
N13
J14 VDDPLL
L14 PA26/NPCS0/NSS
N14
J15 PLLRC
L15 XOUT
N15
K1 A19
M1 D2
P1
K2 A22
M2 D3
P2
K3 A21
M3 VDDCORE
P3
K4 GND
M4 GND
P4
K5 –
M5 GND
P5
K6 –
M6 PB21/TIOB0
P6
K7 –
M7 GND
P7
K8 –
M8 PB27/TIOB2
P8
K9 –
M9 PA0/TCLK3
P9
K10 –
M10 GND
P10
K11 –
M11 PA23/SPCK
P11
K12 PA28/NPCS2
M12 GND
P12
K13 VDDIO
M13 PA21/TXD2
P13
K14 PA27/NPCS1
M14 PA24/MISO
P14
K15 GNDPLL
M15 XIN
P15
AT91M55800A
D4
D6
VDDIO
D14
PB19/TCLK0
VDDIO
PB25/TCLK2
PA1/TIOA3
VDDIO
PA8/TIOB5
PA9/IRQ0
VDDCORE
VDDIO
PA19/RXD1
GND
D5
D7
D8
D9
D15
PB22/TCLK1
PB26/TIOA2
PA2/TIOB3
PA7/TIOA5
PA10/IRQ1
PA11/IRQ2
PA13/FIQ
PA17SCK1
PA18/TXD1/NTRI
PA20/SCK2
Pin AT91M55800A
R1 D10
R2 D11
R3 D12
R4 D13
R5 PB20/TIOA0
R6 PB23/TIOA1
R7 PB24/TIOB1
R8 PA3/TCLK4
R9 PA4/TIOA4
R10 PA5/TIOB4
R11 PA6/TCLK5
R12 PA12/IRQ3
R13 PA14/SCK0
R14 PA15/TXD0
R15 PA16/RXD0
4 AT91M55800A
1745B–ATARM–04/02

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Figure 1. 176-lead TQFP Pinout
132
133
AT91M55800A
89
88
176
1
45
44
Figure 2. 176-ball BGA Pinout
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
1745BATARM04/02
5