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DATASHEET
ISL6262A
Two-Phase Core Controller (Santa Rosa, IMVP-6+)
The ISL6262A is a two-phase buck converter regulator
implementing Intel® IMVP-6+ protocol with embedded gate
drivers. The two-phase buck converter uses two interleaved
channels to effectively double the output voltage ripple
frequency, and thereby reduce output voltage ripple
amplitude with fewer components; lower component cost;
reduced power dissipation; and smaller real estate area.
The heart of the ISL6262A is the patented R3 Technology™,
Intersil’s Robust Ripple Regulator modulator. Compared with
the traditional multiphase buck regulator, the R3
Technology™ has the fastest transient response. This is due
to the R3 modulator commanding variable switching
frequency during a load transient.
Intel® Mobile Voltage Positioning (IMVP) is a smart voltage
regulation technology, which effectively reduces power
dissipation in Intel® Pentium processors. To boost battery
life, the ISL6262A supports DPRSLPVR (deeper sleep),
DPRSTP# and PSI# functions, and maximizes the efficiency
via automatically enabling different phase operation modes.
At heavy load operation of the active mode, the regulator
commands the two phase continuous conduction mode
(CCM) operation. While the PSI# is asserted with medium
load in active mode, the ISL6262A smoothly disables one
phase and operates in one-phase CCM. When the CPU
enters deeper sleep mode, the ISL6262A enables diode
emulation to maximize the efficiency at light load.
For better system power management of the portable
computer, the ISL6262A also provides a CPU power monitor
output. The analog output at the power monitor pin can be
fed into an A/D converter to report instantaneous or average
CPU power.
A 7-bit digital-to-analog converter (DAC) allows dynamic
adjustment of the core output voltage from 0.300V to 1.500V.
A 0.5% system accuracy of the core output voltage
over-temperature is achieved by the ISL6262A.
A unity-gain differential amplifier is provided for remote CPU
die sensing. This allows the voltage on the CPU die to be
accurately measured and regulated per Intel® IMVP-6+
specifications. Current sensing can be realized using either
lossless inductor DCR sensing, or precision resistor sensing.
A single NTC thermistor network thermally compensates the
gain and the time constant of the DCR variations.
FN6343
Rev 1.00
December 23, 2008
Features
• Precision Two/One-phase CORE Voltage Regulator
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
• Internal Gate Driver with 2A Driving Capability
• Dynamic Phase Adding/Dropping
• Microprocessor Voltage Identification Input
- 7-Bit VID Input
- 0.300V to 1.500V in 12.5mV Steps
- Support VID Change On-the-Fly
• Multiple Current Sensing Schemes Supported
- Lossless Inductor DCR Current Sensing
- Precision Resistive Current Sensing
• CPU Power Monitor
• Thermal Monitor
• User Programmable Switching Frequency
• Differential Remote CPU Die Voltage Sensing
• Static and Dynamic Current Sharing
• Overvoltage, Undervoltage, and Overcurrent Protection
• Pb-Free (RoHS Compliant)
Ordering Information
PART NUMBER
PART
(Note)
MARKING
TEMP.
RANGE
(°C)
PACKAGE PKG.
(Pb-Free) DWG. #
ISL6262ACRZ ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6262ACRZ-T* ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6262AIRZ ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
ISL6262AIRZ-T* ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
FN6343 Rev 1.00
December 23, 2008
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ISL6262A
Pinout
ISL6262A
(48 LD 7x7 QFN)
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
PGOOD 1
PSI# 2
PMON 3
RBIAS 4
VR_TT# 5
NTC 6
SOFT 7
OCSET 8
VW 9
COMP 10
FB 11
FB2 12
GND PAD
(BOTTOM)
36 BOOT1
35 UGATE1
34 PHASE1
33 PGND1
32 LGATE1
31 PVCC
30 LGATE2
29 PGND2
28 PHASE2
27 UGATE2
26 BOOT2
25 NC
13 14 15 16 17 18 19 20 21 22 23 24
FN6343 Rev 1.00
December 23, 2008
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ISL6262A
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +7V
Battery Voltage, VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +28V
Boot Voltage (BOOT) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V
Boot to Phase Voltage (BOOT to PHASE . . . . . . -0.3V to +7V (DC)
-0.3V to +9V (<10ns)
Phase Voltage (PHASE) . . . . . . . . . -7V (<20nS Pulse Width, 10µJ)
UGATE Voltage (UGATE) . . . . . . . . . . PHASE -0.3V (DC) to BOOT
. . . . . . . . . . . . . PHASE-5V (<20nS Pulse Width, 10µJ) to BOOT
LGATE Voltage (LGATE) . . . . . . . . . . . . -0.3V (DC) to (VDD +0.3V)
. . . . . . . . . . . . . . -2.5V (<20nS Pulse Width, 5µJ) to (VDD +0.3V)
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VDD +0.3V)
Open Drain Outputs, PGOOD, VR_TT# . . . . . . . . . . . . -0.3 to +7V
Thermal Information
Thermal Resistance (Typical)
JA°C/W JC°C/W
QFN Package (Notes 1, 2). . . . . . . . . .
29
4.5
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to 25V
Ambient Temperature
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10°C to +100°C
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +100°C
Junction Temperature
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10°C to +125°C
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
VDD = 5V, TA = -40°C to +100°C, unless otherwise specified. Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
INPUT POWER SUPPLY
+5V Supply Current
IVDD
VR_ON = 3.3V
VR_ON = 0V
3.6 4.1 mA
1 µA
+3.3V Supply Current
Battery Supply Current at VIN pin
POR (Power-On Reset) Threshold
SYSTEM AND REFERENCES
I3V3
IVIN
PORr
PORf
No load on CLK_EN#
VR_ON = 0V, VIN = 25V
VDD Rising
VDD Falling
1 µA
1 µA
4.35 4.5 V
4.0 4.15
V
System Accuracy
%Error
(VCC_CORE)
ISL6262ACRZ
No load, closed loop, active mode,
TA = 0°C to +100°C, VID = 0.75 to 1.5V
VID = 0.5 to 0.7375V
-0.5
-8
0.5 %
8 mV
VID = 0.3 to 0.4875V
-15 15 mV
System Accuracy
%Error
(VCC_CORE)
ISL6262AIRZ
No load, closed loop, active mode,
TA = -40°C to +100°C, VID = 0.75 to 1.5V
VID = 0.5 to 0.7375V
-0.8
-10
0.8 %
10
VID = 0.3 to 0.4875V
18 18 mV
Droop Amplifier Offset
0.3 0.3
RBIAS Voltage
Boot Voltage
Maximum Output Voltage
RRBIAS
VBOOT
VCC_CORE
(max)
RRBIAS = 147k
VID = [0000000]
1.45
1.188
1.47
1.2
1.5
1.49
1.212
V
V
V
VCC_CORE
(min)
VID = [1100000]
0.3 V
VID Off State
VID = [1111111]
0V
FN6343 Rev 1.00
December 23, 2008
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ISL6262A
Electrical Specifications
VDD = 5V, TA = -40°C to +100°C, unless otherwise specified. Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
CHANNEL FREQUENCY
Nominal Channel Frequency
Adjustment Range
fSW RFSET = 6.9k, 2 channel operation,
VCOMP = 2V
285 300 315 kHz
100 500 kHz
AMPLIFIERS
Droop Amplifier Offset
-0.3 0.3 mV
Error Amp DC Gain
Error Amp Gain-Bandwidth Product
Error Amp Slew Rate
FB Input Current
ISEN
AV0
GBW
SR
IIN(FB)
CL = 20pF
CL = 20pF
90 dB
18 MHz
5 V/µs
10 150 nA
Imbalance Voltage
2 mV
Input Bias Current
20 nA
SOFT-START CURRENT
Soft-Start Current
Soft Geyserville Current
Soft Deeper Sleep Entry Current
Soft Deeper Sleep Exit Current
Soft Deeper Sleep Exit Current
GATE DRIVER DRIVING CAPABILITY
ISS
IGV
IC4
IC4EA
IC4EB
|SOFT - REF|>100mV
DPRSLPVR = 3.3V
DPRSLPVR = 3.3V
DPRSLPVR = 0V
-47
±180
-47
37
180
-42
±205
-42
42
205
-37
±230
-37
47
230
µA
µA
µA
µA
µA
UGATE Source Resistance
RSRC(UGATE) 500mA Source Current
UGATE Source Current
ISRC(UGATE) VUGATE_PHASE = 2.5V
UGATE Sink Resistance
RSNK(UGATE) 500mA Sink Current
UGATE Sink Current
ISNK(UGATE) VUGATE_PHASE = 2.5V
LGATE Source Resistance
RSRC(LGATE) 500mA Source Current
LGATE Source Current
ISRC(LGATE) VLGATE = 2.5V
LGATE Sink Resistance
RSNK(LGATE) 500mA Sink Current
LGATE Sink Current
ISNK(LGATE) VLGATE = 2.5V
UGATE to PHASE Resistance
Rp(UGATE)
GATE DRIVER SWITCHING TIMING (refer to “ISL6262A Gate Driver Timing Diagram” on page 6)
1 1.5
2A
1 1.5
2A
1 1.5
2A
0.5 0.9
4A
1 k
UGATE Rise Time
LGATE Rise Time
UGATE Fall Time
LGATE Fall Time
UGATE Turn-on Propagation Delay
LGATE Turn-on Propagation Delay
BOOTSTRAP DIODE
tRU
tRL
tFU
tFL
tPDHU
tPDHU
PVCC = 5V, 3nF Load
PVCC = 5V, 3nF Load
PVCC = 5V, 3nF Load
PVCC = 5V, 3nF Load
PVCC = 5V, Outputs Unloaded
PVCC = 5V, Outputs Unloaded
8.0 ns
8.0 ns
8.0 ns
4.0 ns
30 ns
15 ns
Forward Voltage
Leakage
POWER GOOD and PROTECTION MONITOR
VDDP = 5V, Forward Bias Current = 2mA
VR = 16V
0.43 0.58 0.72 V
1 µA
PGOOD Low Voltage
PGOOD Leakage Current
VOL
IOH
IPGOOD = 4mA
PGOOD = 3.3V
0.26 0.4 V
-1 1 µA
FN6343 Rev 1.00
December 23, 2008
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ISL6262A
Electrical Specifications
VDD = 5V, TA = -40°C to +100°C, unless otherwise specified. Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
PGOOD Delay
Overvoltage Threshold
Severe Overvoltage Threshold
OCSET Reference Current
OC Threshold Offset
tpgd
OVH
OVHS
CLK_EN# Low to PGOOD High
VO rising above setpoint >1ms
VO rising above setpoint >0.5µs
I (RBIAS) = 10µA
DROOP rising above OCSET >120µs
6.3 7.6 8.9 ms
160 200 240 mV
1.675
1.7
1.725
V
9.8 10 10.2 µA
-3.5 3.5 mV
Current Imbalance Threshold
Difference between ISEN1 and ISEN2 >1ms
9
mV
Undervoltage Threshold
(VDIFF-SOFT)
UVf VO falling below setpoint for >1ms
-360
-300
-240
mV
LOGIC INPUTS
VR_ON, DPRSLPVR Input Low
VR_ON, DPRSLPVR Input High
Leakage Current of VR_ON
Leakage Current of DPRSLPVR
DAC(VID0-VID6), PSI# and
DPRSTP# Input Low
VIL(3.3V)
VIH(3.3V)
IIL(3.3V)
Logic input is low
IIH(3.3V)
Logic input is high at 3.3V
IIL_DPRSLP(3.3V) DPRSLPVR input is low
IIH_DPRSLP(3.3V) DPRSLPVR input is high at 3.3V
VIL(1V)
1V
2.3 V
-1 0
µA
0 1 µA
-1 0
µA
0.45 1 µA
0.3 V
DAC(VID0-VID6), PSI# and
DPRSTP# Input High
VIH(1V)
0.7 V
Leakage Current of DAC(VID0-
VID6), PSI# and DPRSTP#
THERMAL MONITOR
IIL(1V)
IIH(1V)
Logic input is low
Logic input is high at 1V
-1 0
0.45
µA
1 µA
NTC Source Current
NTC = 1.3V
53 60 67 µA
Over-Temperature Threshold
V(NTC) falling
1.18 1.2 1.22 V
VR_TT# Low Output Resistance
POWER MONITOR
RTT I = 20mA
6.5 9
PMON Output Voltage Range
PMON Maximum Voltage
PMON Sourcing Current
PMON Sinking Current
Maximum Current Sinking Capability
Vpmon
Vpmonmax
Isc_pmon
Isk_pmon
VSEN = 1.2V, Droop - VO = 80mV
VSEN = 1V, Droop - VO = 20mV
VSEN = 1V, Droop - VO = 50mV
VSEN = 1V, Droop - VO = 50mV
(see Figure 31)
1.638
0.308
2.8
2
2
PMON/
250
1.680
0.350
3.0
PMON/
180
1.722
0.392
PMON/
130
V
V
V
mA
mA
A
PMON Impedance
When PMON is within its sourcing/sinking
current range (Established by
characterization)
7
CLK_EN# OUTPUT LEVELS
CLK_EN# High Output Voltage
CLK_EN# Low Output Voltage
VOH
VOL
3V3 = 3.3V, I = -4mA
ICLK_EN# = 4mA
2.9 3.1
V
0.26 0.4 V
FN6343 Rev 1.00
December 23, 2008
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