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STL100NH3LL
N-channel 30 V - 0.0032 - 25 A - PowerFLAT™ (6x5)
STripFET™ III Power MOSFET
Features
Type
VDSS
RDS(on)
max
ID
STL100NH3LL
30 V <0.0035 25A (1)
t(s)1. The value is rated according Rthj-pcb
cImproved die-to-footprint ratio
duVery low profile package (1 mm max)
ro )Very low thermal resistance
P t(sConduction losses reduced
te cSwitching losses reduced
sole roduApplication
b PSwitching applications
) - O leteDescription
ct(s bsoThis series utilizes the last advanced design rules
uof ST’s proprietary STripFET™ technology. This
d - Oprocess complete to unique metallization
ro )technique realised the most advanced low voltage
P t(sPower MOSFET in PowerFLAT™(6x5). The chip-
scaled PowerFLAT™ package allows a significant
lete ucboard space saving, still boosting the
dperformance.
PowerFLAT™( 6x5 )
Figure 1. Internal schematic diagram
Obso lete ProTable 1. Device summary
soOrder code
Ob STL100NH3LL
Marking
L100NH3LL
Package
PowerFLAT™ (6x5)
Packaging
Tape and reel
March 2008
Rev 11
1/12
www.st.com
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Contents
Contents
STL100NH3LL
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
)4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolleettee PPrroodduucctt((ss)5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STL100NH3LL
1 Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS Drain-source voltage (VGS = 0)
30 V
VGS(1) Gate-source voltage
± 16 V
VGS(2) Gate-source voltage
± 18 V
ID(3) Drain current (continuous) at TC = 25 °C
100 A
ID (3)
t(s)ID (5)
cIDM(4)
duID(5)
ro )PTOT (3)
lete P uct(sPTOT(5)
Drain current (continuous) at TC = 100 °C
Drain current (continuous) at TC=100 °C
Drain current (pulsed)
Drain current (continuous) at TC = 25 °C
Total dissipation at TC = 25 °C
Total dissipation at TC = 25 °C
Derating factor
so rodTJ Operating junction temperature
Tstg Storage temperature
b P1. Continuous mode
- O te2. Guaranteed for test time 15ms
) le3. The value is rated according Rthj-c
t(s so4. Pulse width limited by safe operating area
c b5. The value is rated according Rthj-pcb
rodu ) - OTable 3. Thermal resistance
P t(sSymbol
Parameter
lete ucRthj-case Thermal resistance junction-case (drain) (steady state)
so rodRthj-pcb (1) Thermal resistance junction-ambient
b P1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec
O leteTable 4. Avalanche data
o Symbol
Parameter
Obs IAV Not-repetitive avalanche current
71
15.6
100
25
80
4
0.03
-55 to 150
Value
1.56
31.3
Value
7.5
A
A
A
A
W
W
W/°C
°C
Unit
°C/W
°C/W
Unit
A
Single pulse avalanche energy
EAS (starting TJ=25 °C, ID=7.5 A)
150 mJ
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Electrical characteristics
2 Electrical characteristics
STL100NH3LL
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
V(BR)DSS
Drain-source breakdown
voltage
ID = 250 µA, VGS= 0
30
V
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = Max rating,
VDS = Max rating @125 °C
1 µA
10 µA
t(s)IGSS
Gate body leakage current
(VDS = 0)
VGS = ±16 V
±100 nA
ucVGS(th) Gate threshold voltage
VDS= VGS, ID = 250 µA
1
2.5 V
Prod t(s)RDS(on)
Static drain-source on
resistance
VGS= 10 V, ID= 12.5 A
VGS= 4.5 V, ID= 12.5 A
0.0032 0.0035
0.004 0.005
lete ducTable 6. Dynamic
so roSymbol
Parameter
Test conditions
Min. Typ. Max. Unit
- Ob te Pgfs (1) Forward transconductance VDS =10 V, ID = 12.5 A
30
) leCiss
t(s oCoss
c bsCrss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25 V, f=1 MHz,
VGS=0
4450
655
50
du - OQg Total gate charge
ro )Qgs Gate-source charge
P t(sQgd Gate-drain charge
VDD=15 V, ID = 25 A
VGS =4.5 V
(see Figure 8)
30 40
12.5
10
solete roducRG Gate input resistance
f=1 MHz Gate DC Bias = 0
Test signal level = 20 mV
open drain
1
2
3
S
pF
pF
pF
nC
nC
nC
OObbsolete P1. Pulsed: pulse duration=300 µs, duty cycle 1.5%
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STL100NH3LL
Electrical characteristics
Table 7. Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD=15 V, ID= 12.5 A,
RG=4.7 Ω, VGS=10 V
(see Figure 14)
Min. Typ. Max. Unit
18 ns
50 ns
75 ns
8 ns
Table 8. Source drain diode
Symbol
Parameter
Test conditions
)ISD Source-drain current
t(sISDM(1) Source-drain current (pulsed)
ducVSD(2) Forward on voltage
ISD=25 A, VGS=0
ro )trr
P t(sQrr
te cIRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=25 A,
di/dt = 100 A/µs,
VDD=25 V, Tj=150 °C
le du1. Pulse width limited by safe operating area
OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolete Pro2. Pulsed: pulse duration=300µs, duty cycle 1.5%
Min Typ. Max Unit
25 A
100 A
1.3 V
32 ns
34 nC
2.1 A
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